* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.

	Add option to offset S12 addresses into XGATE memory space.
	Tweak target flags to match other tools. (i.e. -m m68hc11).
	* doc/as.texinfo: Mention new options.
	* doc/c-m68hc11.texi: Document new options.
	* NEWS: Mention new support.

	* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
	* config.bfd: Likewise.
	* cpu-m9s12x.c: New.
	* cpu-m9s12xg.c: New.
	* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
	Add option to offset S12 addresses into XGATE memory space.
	Fix carry bug in IMM16 (IMM8 low/high) relocate.
	* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
	(ALL_MACHINES_CFILES): Likewise.
	* reloc.c: Add S12X relocs.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	* gas/m68hc11/insns9s12x.s: New
	* gas/m68hc11/insns9s12x.d: New
	* gas/m68hc11/hexprefix.s: New
	* gas/m68hc11/hexprefix.d: New
	* gas/m68hc11/9s12x-exg-sex-tfr.s: New
	* gas/m68hc11/9s12x-exg-sex-tfr.d: New
	* gas/m68hc11/insns9s12xg.s: New
	* gas/m68hc11/insns9s12xg.d: New
	* gas/m68hc11/9s12x-mov.s: New
	* gas/m68hc11/9s12x-mov.d: New
	* gas/m68hc11/m68hc11.exp: Updated
	* gas/m68hc11/*.d: Brought in line with changed objdump output.
	* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
	* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
	* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
	* gas/elf/dwarf2-2.d: Likewise.

	* ld-m68hc11/xgate-link.s: New.
	* ld-m68hc11/xgate-link.d: New.
	* ld-m68hc11/xgate-offset.s: New.
	* ld-m68hc11/xgate-offset.d: New.
	* ld-m68hc11/xgate1.s: New.
	* ld-m68hc11/xgate1.d: New.
	* ld-m68hc11/xgate2.s: New.
	* ld-m68hc11/m68hc11.exp: Updated.
	* ld-m68hc11/*.d: Brought in line with changed objdump output.
	* ld-gc/gc.exp: Update CFLAGS for m68hc11.
	* ld-plugin/plugin.exp: Likewise.
	* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	* dis-asm.h (print_insn_m9s12x): Prototype.
	(print_insn_m9s12xg): Prototype.

	* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
	R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
	(E_M68HC11_XGATE_RAMOFFSET): Define.

	* m68hc11.h: Add XGate definitions.
	(struct m68hc11_opcode): Add xg_mask field.

12 files changed, 324 insertions, 11 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index be53666..05bc0de 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,20 @@
+2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
+	    Stephane Carrez <stcarrez@nerim.fr>
+
+	* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
+	* config.bfd: Likewise.
+	* cpu-m9s12x.c: New.
+	* cpu-m9s12xg.c: New.
+	* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
+	Add option to offset S12 addresses into XGATE memory space.
+	Fix carry bug in IMM16 (IMM8 low/high) relocate.
+	* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
+	(ALL_MACHINES_CFILES): Likewise.
+	* reloc.c: Add S12X relocs.
+	* Makefile.in: Regenerate.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 	    Catherine Moore  <clm@codesourcery.com>
 
@@ -36,7 +53,7 @@
 	(elf_backend_lookup_section_flags_hook): Define.
 	(elf_backend_section_flags): Define.
 	(elf_backend_section_processing): Define.
-	* elf32-ppc.h (ppc_elf_section_processing): Declare. 
+	* elf32-ppc.h (ppc_elf_section_processing): Declare.
 	* libbfd.h: Regenerated.
 	* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
 	BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 0414cc7..b7271cc 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -105,6 +105,8 @@ ALL_MACHINES = \
 	cpu-m32r.lo \
 	cpu-m68hc11.lo \
 	cpu-m68hc12.lo \
+	cpu-m9s12x.lo \
+	cpu-m9s12xg.lo \
 	cpu-m68k.lo \
 	cpu-m88k.lo \
 	cpu-mcore.lo \
@@ -183,6 +185,8 @@ ALL_MACHINES_CFILES = \
 	cpu-m32r.c \
 	cpu-m68hc11.c \
 	cpu-m68hc12.c \
+	cpu-m9s12x.c \
+	cpu-m9s12xg.c \
 	cpu-m68k.c \
 	cpu-m88k.c \
 	cpu-mcore.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index bf3a162..7a48fda 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -404,6 +404,8 @@ ALL_MACHINES = \
 	cpu-m32r.lo \
 	cpu-m68hc11.lo \
 	cpu-m68hc12.lo \
+	cpu-m9s12x.lo \
+	cpu-m9s12xg.lo \
 	cpu-m68k.lo \
 	cpu-m88k.lo \
 	cpu-mcore.lo \
@@ -482,6 +484,8 @@ ALL_MACHINES_CFILES = \
 	cpu-m32r.c \
 	cpu-m68hc11.c \
 	cpu-m68hc12.c \
+	cpu-m9s12x.c \
+	cpu-m9s12xg.c \
 	cpu-m68k.c \
 	cpu-m88k.c \
 	cpu-mcore.c \
diff --git a/bfd/archures.c b/bfd/archures.c
index c6f1c2a..a23534b 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -266,6 +266,8 @@ DESCRIPTION
 .#define bfd_mach_m6812_default 0
 .#define bfd_mach_m6812         1
 .#define bfd_mach_m6812s        2
+.  bfd_arch_m9s12x,   {* Freescale S12X *}
+.  bfd_arch_m9s12xg,  {* Freescale XGATE *}
 .  bfd_arch_z8k,       {* Zilog Z8000 *}
 .#define bfd_mach_z8001		1
 .#define bfd_mach_z8002		2
@@ -535,6 +537,8 @@ extern const bfd_arch_info_type bfd_m32c_arch;
 extern const bfd_arch_info_type bfd_m32r_arch;
 extern const bfd_arch_info_type bfd_m68hc11_arch;
 extern const bfd_arch_info_type bfd_m68hc12_arch;
+extern const bfd_arch_info_type bfd_m9s12x_arch;
+extern const bfd_arch_info_type bfd_m9s12xg_arch;
 extern const bfd_arch_info_type bfd_m68k_arch;
 extern const bfd_arch_info_type bfd_m88k_arch;
 extern const bfd_arch_info_type bfd_mcore_arch;
@@ -618,6 +622,8 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
     &bfd_m32r_arch,
     &bfd_m68hc11_arch,
     &bfd_m68hc12_arch,
+    &bfd_m9s12x_arch,
+    &bfd_m9s12xg_arch,
     &bfd_m68k_arch,
     &bfd_m88k_arch,
     &bfd_mcore_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 8e6ff42..fa2b9a5 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1958,6 +1958,8 @@ enum bfd_architecture
 #define bfd_mach_m6812_default 0
 #define bfd_mach_m6812         1
 #define bfd_mach_m6812s        2
+  bfd_arch_m9s12x,   /* Freescale S12X */
+  bfd_arch_m9s12xg,  /* Freescale XGATE */
   bfd_arch_z8k,       /* Zilog Z8000 */
 #define bfd_mach_z8001         1
 #define bfd_mach_z8002         2
@@ -4546,6 +4548,32 @@ This is a 4-bit pc-relative reloc.  */
 This is a 5-bit pc-relative reloc.  */
   BFD_RELOC_XGATE_IMM5,
 
+/* Motorola 68HC12 reloc.
+This is the 9 bits of a value.  */
+  BFD_RELOC_M68HC12_9B,
+
+/* Motorola 68HC12 reloc.
+This is the 16 bits of a value.  */
+  BFD_RELOC_M68HC12_16B,
+
+/* Motorola 68HC12/XGATE reloc.
+This is a PCREL9 branch.  */
+  BFD_RELOC_M68HC12_9_PCREL,
+
+/* Motorola 68HC12/XGATE reloc.
+This is a PCREL10 branch.  */
+  BFD_RELOC_M68HC12_10_PCREL,
+
+/* Motorola 68HC12/XGATE reloc.
+This is the 8 bit low part of an absolute address and immediately precedes
+a matching HI8XG part.  */
+  BFD_RELOC_M68HC12_LO8XG,
+
+/* Motorola 68HC12/XGATE reloc.
+This is the 8 bit high part of an absolute address and immediately follows
+a matching LO8XG part.  */
+  BFD_RELOC_M68HC12_HI8XG,
+
 /* NS CR16C Relocations.  */
   BFD_RELOC_16C_NUM08,
   BFD_RELOC_16C_NUM08_C,
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 3f758c0..783d1f3 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -85,8 +85,8 @@ hppa*)		 targ_archs=bfd_hppa_arch ;;
 i[3-7]86)	 targ_archs=bfd_i386_arch ;;
 i370)		 targ_archs=bfd_i370_arch ;;
 lm32)	         targ_archs=bfd_lm32_arch ;;
-m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch" ;;
-m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch" ;;
+m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
+m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
 m68*)		 targ_archs=bfd_m68k_arch ;;
 m88*)		 targ_archs=bfd_m88k_arch ;;
 microblaze*)	 targ_archs=bfd_microblaze_arch ;;
diff --git a/bfd/cpu-m9s12x.c b/bfd/cpu-m9s12x.c
new file mode 100644
index 0000000..d224b83
--- /dev/null
+++ b/bfd/cpu-m9s12x.c
@@ -0,0 +1,41 @@
+/* BFD support for the Freescale 9S12X processor
+   Copyright 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_m9s12x_arch =
+{
+    16,	/* 16 bits in a word.  */
+    32,	/* 16 bits in an address.  */
+    8,	/* 8 bits in a byte.  */
+    bfd_arch_m9s12x,
+    0,
+    "m9s12x",
+    "m9s12x",
+    4, /* Section alignment power.  */
+    TRUE,
+    bfd_default_compatible,
+    bfd_default_scan,
+    bfd_arch_default_fill,
+    0,
+};
+
diff --git a/bfd/cpu-m9s12xg.c b/bfd/cpu-m9s12xg.c
new file mode 100644
index 0000000..6958a13
--- /dev/null
+++ b/bfd/cpu-m9s12xg.c
@@ -0,0 +1,41 @@
+/* BFD support for the Freescale 9S12-XGATE co-processor
+   Copyright 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_m9s12xg_arch =
+{
+    16,	/* 16 bits in a word.  */
+    32,	/* 16 bits in an address.  */
+    8,	/* 8 bits in a byte.  */
+    bfd_arch_m9s12xg,
+    0,
+    "m9s12xg",
+    "m9s12xg",
+    4, /* Section alignment power.  */
+    TRUE,
+    bfd_default_compatible,
+    bfd_default_scan,
+    bfd_arch_default_fill,
+    0,
+};
+
diff --git a/bfd/elf32-m68hc12.c b/bfd/elf32-m68hc12.c
index 2b16641..448853d 100644
--- a/bfd/elf32-m68hc12.c
+++ b/bfd/elf32-m68hc12.c
@@ -324,11 +324,81 @@ static reloc_howto_type elf_m68hc11_howto_table[] = {
 	 FALSE),		/* pcrel_offset */
 
   EMPTY_HOWTO (14),
-  EMPTY_HOWTO (15),
-  EMPTY_HOWTO (16),
-  EMPTY_HOWTO (17),
-  EMPTY_HOWTO (18),
-  EMPTY_HOWTO (19),
+
+  /* A 16 bit absolute relocation.  */
+  HOWTO (R_M68HC12_16B,		/* type */
+	 0,			/* rightshift */
+	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_bitfield,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_M68HC12_16B",	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,			/* src_mask */
+	 0xffff,			/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* A 9 bit PC-rel relocation.  */
+  HOWTO (R_M68HC12_PCREL_9,	/* type */
+	 1,			/* rightshift */
+	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+	 10,			/* bitsize (result is >>1) */
+	 TRUE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_M68HC12_PCREL_9",	/* name */
+	 TRUE,			/* partial_inplace */
+	 0xfe00,		/* src_mask */
+	 0x01ff,		/* dst_mask */
+	 TRUE),                 /* pcrel_offset */
+
+  /* A 10 bit PC-rel relocation.  */
+  HOWTO (R_M68HC12_PCREL_10,	/* type */
+	 1,			/* rightshift */
+	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+	 11,			/* bitsize (result is >>1) */
+	 TRUE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_M68HC12_PCREL_10",	/* name */
+	 TRUE,			/* partial_inplace */
+	 0xfc00,		/* src_mask */
+	 0x03ff,		/* dst_mask */
+	 TRUE),                 /* pcrel_offset */
+
+  /* A 8 bit absolute relocation (upper address).  */
+  HOWTO (R_M68HC12_HI8XG,		/* type */
+	 8,			/* rightshift */
+	 0,			/* size (0 = byte, 1 = short, 2 = long) */
+	 8,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_bitfield,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_M68HC12_HI8XG",	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x00ff,		/* src_mask */
+	 0x00ff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* A 8 bit absolute relocation (lower address).  */
+  HOWTO (R_M68HC12_LO8XG,		/* type */
+	 8,			/* rightshift */
+	 0,			/* size (0 = byte, 1 = short, 2 = long) */
+	 8,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_bitfield,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_M68HC12_LO8XG",	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x00ff,		/* src_mask */
+	 0x00ff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
 
   /* Mark beginning of a jump instruction (any form).  */
   HOWTO (R_M68HC11_RL_JUMP,	/* type */
@@ -369,7 +439,8 @@ struct m68hc11_reloc_map
   unsigned char elf_reloc_val;
 };
 
-static const struct m68hc11_reloc_map m68hc11_reloc_map[] = {
+static const struct m68hc11_reloc_map m68hc11_reloc_map[] =
+{
   {BFD_RELOC_NONE, R_M68HC11_NONE,},
   {BFD_RELOC_8, R_M68HC11_8},
   {BFD_RELOC_M68HC11_HI8, R_M68HC11_HI8},
@@ -389,6 +460,13 @@ static const struct m68hc11_reloc_map m68hc11_reloc_map[] = {
 
   {BFD_RELOC_M68HC11_RL_JUMP, R_M68HC11_RL_JUMP},
   {BFD_RELOC_M68HC11_RL_GROUP, R_M68HC11_RL_GROUP},
+
+  {BFD_RELOC_M68HC12_16B, R_M68HC12_16B},
+
+  {BFD_RELOC_M68HC12_9_PCREL, R_M68HC12_PCREL_9},
+  {BFD_RELOC_M68HC12_10_PCREL, R_M68HC12_PCREL_10},
+  {BFD_RELOC_M68HC12_HI8XG, R_M68HC12_HI8XG},
+  {BFD_RELOC_M68HC12_LO8XG, R_M68HC12_LO8XG},
 };
 
 static reloc_howto_type *
diff --git a/bfd/elf32-m68hc1x.c b/bfd/elf32-m68hc1x.c
index f5762a4..70bf09e 100644
--- a/bfd/elf32-m68hc1x.c
+++ b/bfd/elf32-m68hc1x.c
@@ -949,6 +949,7 @@ elf32_m68hc11_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
       bfd_vma insn_page;
       bfd_boolean is_far = FALSE;
       struct elf_link_hash_entry *h;
+      bfd_vma val;
 
       r_symndx = ELF32_R_SYM (rel->r_info);
       r_type = ELF32_R_TYPE (rel->r_info);
@@ -1029,6 +1030,50 @@ elf32_m68hc11_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
       phys_page = m68hc11_phys_page (pinfo, relocation + rel->r_addend);
       switch (r_type)
         {
+        case R_M68HC12_LO8XG:
+          /* This relocation is specific to XGATE IMM16 calls and will precede
+	     a HI8. tc-m68hc11 only generates them in pairs.
+	     Leave the relocation to the HI8XG step.  */
+          r = bfd_reloc_ok;
+          r_type = R_M68HC11_NONE;
+          break;
+
+        case R_M68HC12_HI8XG:
+          /* This relocation is specific to XGATE IMM16 calls and must follow
+             a LO8XG. Does not actually check that it was a LO8XG.
+	     Adjusts high and low bytes.  */
+          relocation = phys_addr;
+          if ((elf_elfheader (input_bfd)->e_flags & E_M68HC11_XGATE_RAMOFFSET)
+	      && (relocation >= 0x2000))
+	    relocation += 0xc000; /* HARDCODED RAM offset for XGATE.  */
+
+          /* Fetch 16 bit value including low byte in previous insn.  */
+          val = (bfd_get_8 (input_bfd, (bfd_byte*) contents + rel->r_offset) << 8)
+	    | bfd_get_8 (input_bfd, (bfd_byte*) contents + rel->r_offset - 2);
+
+          /* Add on value to preserve carry, then write zero to high byte.  */
+          relocation += val;
+
+          /* Write out top byte.  */
+          bfd_put_8 (input_bfd, (relocation >> 8) & 0xff,
+		     (bfd_byte*) contents + rel->r_offset);
+
+          /* Write out low byte to previous instruction.  */
+          bfd_put_8 (input_bfd, relocation & 0xff,
+		     (bfd_byte*) contents + rel->r_offset - 2);
+
+          /* Mark as relocation completed.  */
+          r = bfd_reloc_ok;
+          r_type = R_M68HC11_NONE;
+          break;
+
+        /* The HI8 and LO8 relocs are generated by %hi(expr) %lo(expr)
+           assembler directives. %hi does not support carry.  */
+        case R_M68HC11_HI8:
+        case R_M68HC11_LO8:
+          relocation = phys_addr;
+          break;
+
         case R_M68HC11_24:
           /* Reloc used by 68HC12 call instruction.  */
           bfd_put_16 (input_bfd, phys_addr,
@@ -1123,10 +1168,18 @@ elf32_m68hc11_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
             relocation = phys_addr;
           break;
         }
+
       if (r_type != R_M68HC11_NONE)
-        r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+        {
+          if ((r_type == R_M68HC12_PCREL_9) || (r_type == R_M68HC12_PCREL_10))
+            r = _bfd_final_link_relocate (howto, input_bfd, input_section,
                                       contents, rel->r_offset,
-                                      relocation, rel->r_addend);
+                                      relocation - 2, rel->r_addend);
+          else
+            r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+                                          contents, rel->r_offset,
+                                          relocation, rel->r_addend);
+        }
 
       if (r != bfd_reloc_ok)
 	{
@@ -1317,6 +1370,9 @@ _bfd_m68hc11_elf_print_private_bfd_data (bfd *abfd, void *ptr)
   else
     fprintf (file, _(" [memory=flat]"));
 
+  if (elf_elfheader (abfd)->e_flags & E_M68HC11_XGATE_RAMOFFSET)
+    fprintf (file, _(" [XGATE RAM offsetting]"));
+
   fputc ('\n', file);
 
   return TRUE;
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 94fb0a1..173c009 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2125,6 +2125,12 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_XGATE_IMM3",
   "BFD_RELOC_XGATE_IMM4",
   "BFD_RELOC_XGATE_IMM5",
+  "BFD_RELOC_M68HC12_9B",
+  "BFD_RELOC_M68HC12_16B",
+  "BFD_RELOC_M68HC12_9_PCREL",
+  "BFD_RELOC_M68HC12_10_PCREL",
+  "BFD_RELOC_M68HC12_LO8XG",
+  "BFD_RELOC_M68HC12_HI8XG",
   "BFD_RELOC_16C_NUM08",
   "BFD_RELOC_16C_NUM08_C",
   "BFD_RELOC_16C_NUM16",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index a9fd397..978fe8d 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -5092,6 +5092,38 @@ ENUMDOC
   Freescale XGATE reloc.
   This is a 5-bit pc-relative reloc.
 ENUM
+  BFD_RELOC_M68HC12_9B
+ENUMDOC
+  Motorola 68HC12 reloc.
+  This is the 9 bits of a value.
+ENUM
+  BFD_RELOC_M68HC12_16B
+ENUMDOC
+  Motorola 68HC12 reloc.
+  This is the 16 bits of a value.
+ENUM
+  BFD_RELOC_M68HC12_9_PCREL
+ENUMDOC
+  Motorola 68HC12/XGATE reloc.
+  This is a PCREL9 branch.
+ENUM
+  BFD_RELOC_M68HC12_10_PCREL
+ENUMDOC
+  Motorola 68HC12/XGATE reloc.
+  This is a PCREL10 branch.
+ENUM
+  BFD_RELOC_M68HC12_LO8XG
+ENUMDOC
+  Motorola 68HC12/XGATE reloc.
+  This is the 8 bit low part of an absolute address and immediately precedes
+  a matching HI8XG part.
+ENUM
+  BFD_RELOC_M68HC12_HI8XG
+ENUMDOC
+  Motorola 68HC12/XGATE reloc.
+  This is the 8 bit high part of an absolute address and immediately follows
+  a matching LO8XG part.
+ENUM
   BFD_RELOC_16C_NUM08
 ENUMX
   BFD_RELOC_16C_NUM08_C