diff options
author | John Darrington <john@darrington.wattle.id.au> | 2018-05-18 15:26:18 +0100 |
---|---|---|
committer | Nick Clifton <nickc@redhat.com> | 2018-05-18 15:26:18 +0100 |
commit | 7b4ae824289504c173a597e86a00ceab452095b7 (patch) | |
tree | 98efc51666beecffead172a6c29c4c1f75b14174 /bfd | |
parent | 011b32fd4270fb7111ee1f63695ccd44562ee7df (diff) | |
download | gdb-7b4ae824289504c173a597e86a00ceab452095b7.zip gdb-7b4ae824289504c173a597e86a00ceab452095b7.tar.gz gdb-7b4ae824289504c173a597e86a00ceab452095b7.tar.bz2 |
Add support for the Freescale s12z processor.
bfd * Makefile.am: Add s12z files.
* Makefile.in: Regenerate.
* archures.c: Add bfd_s12z_arch.
* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
* bfd-in2.h: Regenerate.
* config.bfd: Add s12z target.
* configure.ac: Add s12z target.
* configure: Regenerate.
* cpu-s12z.c: New file.
* elf32-s12z.c: New file.
* libbfd.c (bfd_putb24): New function.
(bfd_putl24): New function.
* libbfd.h: Regenerate.
* reloc.c: Add s12z relocations.
(bfd_get_reloc_size): Handle size 5 relocs.
* targets.c: Add s12z_elf32_vec.
opcodes * Makefile.am: Add support for s12z architecture.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* s12z-dis.c: New file.
* s12z.h: New file.
include * elf/s12z.h: New header.
ld * Makefile.am: Add support for s12z architecture.
* configure.tgt: Likewise.
* Makefile.in: Regenerate.
* emulparams/m9s12zelf.sh: New file.
* scripttempl/elfm9s12z.sc: New file.
* testsuite/ld-discard/static.d: Expect to fail for the s12z
target.
* testsuite/ld-elf/endsym.d: Likewise.
* testsuite/ld-elf/merge.d: Likewise.
* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
* testsuite/ld-elf/sec64k.exp: Likewise.
* testsuite/ld-s12z: New directory.
* testsuite/ld-s12z/opr-linking.d: New file.
* testsuite/ld-s12z/opr-linking.s: New file.
* testsuite/ld-s12z/relative-linking.d: New file.
* testsuite/ld-s12z/relative-linking.s: New file.
* testsuite/ld-s12z/z12s.exp: New file.
gas * Makefile.am: Add support for s12z target.
* Makefile.in: Regenerate.
* NEWS: Mention the new support.
* config/tc-s12z.c: New file.
* config/tc-s12z.h: New file.
* configure.tgt: Add s12z support.
* doc/Makefile.am: Likewise.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add s12z documentation.
* doc/as.textinfo: Likewise.
* doc/c-s12z.texi: New file.
* testsuite/gas/s12z: New directory.
* testsuite/gas/s12z/abs.d: New file.
* testsuite/gas/s12z/abs.s: New file.
* testsuite/gas/s12z/adc-imm.d: New file.
* testsuite/gas/s12z/adc-imm.s: New file.
* testsuite/gas/s12z/adc-opr.d: New file.
* testsuite/gas/s12z/adc-opr.s: New file.
* testsuite/gas/s12z/add-imm.d: New file.
* testsuite/gas/s12z/add-imm.s: New file.
* testsuite/gas/s12z/add-opr.d: New file.
* testsuite/gas/s12z/add-opr.s: New file.
* testsuite/gas/s12z/and-imm.d: New file.
* testsuite/gas/s12z/and-imm.s: New file.
* testsuite/gas/s12z/and-opr.d: New file.
* testsuite/gas/s12z/and-opr.s: New file.
* testsuite/gas/s12z/and-or-cc.d: New file.
* testsuite/gas/s12z/and-or-cc.s: New file.
* testsuite/gas/s12z/bfext-special.d: New file.
* testsuite/gas/s12z/bfext-special.s: New file.
* testsuite/gas/s12z/bfext.d: New file.
* testsuite/gas/s12z/bfext.s: New file.
* testsuite/gas/s12z/bit-manip.d: New file.
* testsuite/gas/s12z/bit-manip.s: New file.
* testsuite/gas/s12z/bit.d: New file.
* testsuite/gas/s12z/bit.s: New file.
* testsuite/gas/s12z/bra-expression-defined.d: New file.
* testsuite/gas/s12z/bra-expression-defined.s: New file.
* testsuite/gas/s12z/bra-expression-undef.d: New file.
* testsuite/gas/s12z/bra-expression-undef.s: New file.
* testsuite/gas/s12z/bra.d: New file.
* testsuite/gas/s12z/bra.s: New file.
* testsuite/gas/s12z/brclr-symbols.d: New file.
* testsuite/gas/s12z/brclr-symbols.s: New file.
* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
* testsuite/gas/s12z/clb.d: New file.
* testsuite/gas/s12z/clb.s: New file.
* testsuite/gas/s12z/clr-opr.d: New file.
* testsuite/gas/s12z/clr-opr.s: New file.
* testsuite/gas/s12z/clr.d: New file.
* testsuite/gas/s12z/clr.s: New file.
* testsuite/gas/s12z/cmp-imm.d: New file.
* testsuite/gas/s12z/cmp-imm.s: New file.
* testsuite/gas/s12z/cmp-opr-inc.d: New file.
* testsuite/gas/s12z/cmp-opr-inc.s: New file.
* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
* testsuite/gas/s12z/cmp-opr-reg.d: New file.
* testsuite/gas/s12z/cmp-opr-reg.s: New file.
* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
* testsuite/gas/s12z/cmp-opr-xys.d: New file.
* testsuite/gas/s12z/cmp-opr-xys.s: New file.
* testsuite/gas/s12z/cmp-s-imm.d: New file.
* testsuite/gas/s12z/cmp-s-imm.s: New file.
* testsuite/gas/s12z/cmp-s-opr.d: New file.
* testsuite/gas/s12z/cmp-s-opr.s: New file.
* testsuite/gas/s12z/cmp-xy.d: New file.
* testsuite/gas/s12z/cmp-xy.s: New file.
* testsuite/gas/s12z/com-opr.d: New file.
* testsuite/gas/s12z/com-opr.s: New file.
* testsuite/gas/s12z/complex-shifts.d: New file.
* testsuite/gas/s12z/complex-shifts.s: New file.
* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
* testsuite/gas/s12z/dbCC.d: New file.
* testsuite/gas/s12z/dbCC.s: New file.
* testsuite/gas/s12z/dec-opr.d: New file.
* testsuite/gas/s12z/dec-opr.s: New file.
* testsuite/gas/s12z/dec.d: New file.
* testsuite/gas/s12z/dec.s: New file.
* testsuite/gas/s12z/div.d: New file.
* testsuite/gas/s12z/div.s: New file.
* testsuite/gas/s12z/eor.d: New file.
* testsuite/gas/s12z/eor.s: New file.
* testsuite/gas/s12z/exg.d: New file.
* testsuite/gas/s12z/exg.s: New file.
* testsuite/gas/s12z/ext24-ld-xy.d: New file.
* testsuite/gas/s12z/ext24-ld-xy.s: New file.
* testsuite/gas/s12z/inc-opr.d: New file.
* testsuite/gas/s12z/inc-opr.s: New file.
* testsuite/gas/s12z/inc.d: New file.
* testsuite/gas/s12z/inc.s: New file.
* testsuite/gas/s12z/inh.d: New file.
* testsuite/gas/s12z/inh.s: New file.
* testsuite/gas/s12z/jmp.d: New file.
* testsuite/gas/s12z/jmp.s: New file.
* testsuite/gas/s12z/jsr.d: New file.
* testsuite/gas/s12z/jsr.s: New file.
* testsuite/gas/s12z/ld-imm-page2.d: New file.
* testsuite/gas/s12z/ld-imm-page2.s: New file.
* testsuite/gas/s12z/ld-imm.d: New file.
* testsuite/gas/s12z/ld-imm.s: New file.
* testsuite/gas/s12z/ld-immu18.d: New file.
* testsuite/gas/s12z/ld-immu18.s: New file.
* testsuite/gas/s12z/ld-large-direct.d: New file.
* testsuite/gas/s12z/ld-large-direct.s: New file.
* testsuite/gas/s12z/ld-opr.d: New file.
* testsuite/gas/s12z/ld-opr.s: New file.
* testsuite/gas/s12z/ld-s-opr.d: New file.
* testsuite/gas/s12z/ld-s-opr.s: New file.
* testsuite/gas/s12z/ld-small-direct.d: New file.
* testsuite/gas/s12z/ld-small-direct.s: New file.
* testsuite/gas/s12z/lea-immu18.d: New file.
* testsuite/gas/s12z/lea-immu18.s: New file.
* testsuite/gas/s12z/lea.d: New file.
* testsuite/gas/s12z/lea.s: New file.
* testsuite/gas/s12z/mac.d: New file.
* testsuite/gas/s12z/mac.s: New file.
* testsuite/gas/s12z/min-max.d: New file.
* testsuite/gas/s12z/min-max.s: New file.
* testsuite/gas/s12z/mod.d: New file.
* testsuite/gas/s12z/mod.s: New file.
* testsuite/gas/s12z/mov.d: New file.
* testsuite/gas/s12z/mov.s: New file.
* testsuite/gas/s12z/mul-imm.d: New file.
* testsuite/gas/s12z/mul-imm.s: New file.
* testsuite/gas/s12z/mul-opr-opr.d: New file.
* testsuite/gas/s12z/mul-opr-opr.s: New file.
* testsuite/gas/s12z/mul-opr.d: New file.
* testsuite/gas/s12z/mul-opr.s: New file.
* testsuite/gas/s12z/mul-reg.d: New file.
* testsuite/gas/s12z/mul-reg.s: New file.
* testsuite/gas/s12z/mul.d: New file.
* testsuite/gas/s12z/mul.s: New file.
* testsuite/gas/s12z/neg-opr.d: New file.
* testsuite/gas/s12z/neg-opr.s: New file.
* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
* testsuite/gas/s12z/opr-18u.d: New file.
* testsuite/gas/s12z/opr-18u.s: New file.
* testsuite/gas/s12z/opr-expr.d: New file.
* testsuite/gas/s12z/opr-expr.s: New file.
* testsuite/gas/s12z/opr-ext-18.d: New file.
* testsuite/gas/s12z/opr-ext-18.s: New file.
* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
* testsuite/gas/s12z/opr-idx3-reg.d: New file.
* testsuite/gas/s12z/opr-idx3-reg.s: New file.
* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
* testsuite/gas/s12z/opr-indirect-expr.d: New file.
* testsuite/gas/s12z/opr-indirect-expr.s: New file.
* testsuite/gas/s12z/opr-symbol.d: New file.
* testsuite/gas/s12z/opr-symbol.s: New file.
* testsuite/gas/s12z/or-imm.d: New file.
* testsuite/gas/s12z/or-imm.s: New file.
* testsuite/gas/s12z/or-opr.d: New file.
* testsuite/gas/s12z/or-opr.s: New file.
* testsuite/gas/s12z/p2-mul.d: New file.
* testsuite/gas/s12z/p2-mul.s: New file.
* testsuite/gas/s12z/page2-inh.d: New file.
* testsuite/gas/s12z/page2-inh.s: New file.
* testsuite/gas/s12z/psh-pul.d: New file.
* testsuite/gas/s12z/psh-pul.s: New file.
* testsuite/gas/s12z/qmul.d: New file.
* testsuite/gas/s12z/qmul.s: New file.
* testsuite/gas/s12z/rotate.d: New file.
* testsuite/gas/s12z/rotate.s: New file.
* testsuite/gas/s12z/s12z.exp: New file.
* testsuite/gas/s12z/sat.d: New file.
* testsuite/gas/s12z/sat.s: New file.
* testsuite/gas/s12z/sbc-imm.d: New file.
* testsuite/gas/s12z/sbc-imm.s: New file.
* testsuite/gas/s12z/sbc-opr.d: New file.
* testsuite/gas/s12z/sbc-opr.s: New file.
* testsuite/gas/s12z/shift.d: New file.
* testsuite/gas/s12z/shift.s: New file.
* testsuite/gas/s12z/simple-shift.d: New file.
* testsuite/gas/s12z/simple-shift.s: New file.
* testsuite/gas/s12z/single-ops.d: New file.
* testsuite/gas/s12z/single-ops.s: New file.
* testsuite/gas/s12z/specd6.d: New file.
* testsuite/gas/s12z/specd6.s: New file.
* testsuite/gas/s12z/st-large-direct.d: New file.
* testsuite/gas/s12z/st-large-direct.s: New file.
* testsuite/gas/s12z/st-opr.d: New file.
* testsuite/gas/s12z/st-opr.s: New file.
* testsuite/gas/s12z/st-s-opr.d: New file.
* testsuite/gas/s12z/st-s-opr.s: New file.
* testsuite/gas/s12z/st-small-direct.d: New file.
* testsuite/gas/s12z/st-small-direct.s: New file.
* testsuite/gas/s12z/st-xy.d: New file.
* testsuite/gas/s12z/st-xy.s: New file.
* testsuite/gas/s12z/sub-imm.d: New file.
* testsuite/gas/s12z/sub-imm.s: New file.
* testsuite/gas/s12z/sub-opr.d: New file.
* testsuite/gas/s12z/sub-opr.s: New file.
* testsuite/gas/s12z/tfr.d: New file.
* testsuite/gas/s12z/tfr.s: New file.
* testsuite/gas/s12z/trap.d: New file.
* testsuite/gas/s12z/trap.s: New file.
binutils* readelf.c: Add support for s12z architecture.
* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
targets.
Diffstat (limited to 'bfd')
-rw-r--r-- | bfd/ChangeLog | 19 | ||||
-rw-r--r-- | bfd/Makefile.am | 4 | ||||
-rw-r--r-- | bfd/Makefile.in | 6 | ||||
-rw-r--r-- | bfd/archures.c | 4 | ||||
-rw-r--r-- | bfd/bfd-in.h | 2 | ||||
-rw-r--r-- | bfd/bfd-in2.h | 9 | ||||
-rw-r--r-- | bfd/config.bfd | 4 | ||||
-rwxr-xr-x | bfd/configure | 1 | ||||
-rw-r--r-- | bfd/configure.ac | 1 | ||||
-rw-r--r-- | bfd/cpu-s12z.c | 41 | ||||
-rw-r--r-- | bfd/elf32-s12z.c | 270 | ||||
-rw-r--r-- | bfd/libbfd.c | 21 | ||||
-rw-r--r-- | bfd/libbfd.h | 1 | ||||
-rw-r--r-- | bfd/reloc.c | 17 | ||||
-rw-r--r-- | bfd/targets.c | 3 |
15 files changed, 403 insertions, 0 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index a9248e6..0319fa7 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,22 @@ +2018-05-18 John Darrington <john@darrington.wattle.id.au> + + * Makefile.am: Add s12z files. + * Makefile.in: Regenerate. + * archures.c: Add bfd_s12z_arch. + * bfd-in.h: Add exports of bfd_putb24 and bfd_putl24. + * bfd-in2.h: Regenerate. + * config.bfd: Add s12z target. + * configure.ac: Add s12z target. + * configure: Regenerate. + * cpu-s12z.c: New file. + * elf32-s12z.c: New file. + * libbfd.c (bfd_putb24): New function. + (bfd_putl24): New function. + * libbfd.h: Regenerate. + * reloc.c: Add s12z relocations. + (bfd_get_reloc_size): Handle size 5 relocs. + * targets.c: Add s12z_elf32_vec. + 2018-05-18 H.J. Lu <hongjiu.lu@intel.com> PR ld/23189 diff --git a/bfd/Makefile.am b/bfd/Makefile.am index 8500a4f..8374bbd 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -123,6 +123,7 @@ ALL_MACHINES = \ cpu-m68hc11.lo \ cpu-m68hc12.lo \ cpu-m9s12x.lo \ + cpu-s12z.lo \ cpu-m9s12xg.lo \ cpu-m68k.lo \ cpu-mcore.lo \ @@ -207,6 +208,7 @@ ALL_MACHINES_CFILES = \ cpu-m68hc11.c \ cpu-m68hc12.c \ cpu-m9s12x.c \ + cpu-s12z.c \ cpu-m9s12xg.c \ cpu-m68k.c \ cpu-mcore.c \ @@ -322,6 +324,7 @@ BFD32_BACKENDS = \ elf32-m68hc12.lo \ elf32-m68hc1x.lo \ elf32-m68k.lo \ + elf32-s12z.lo \ elf32-mcore.lo \ elf32-mep.lo \ elf32-metag.lo \ @@ -458,6 +461,7 @@ BFD32_BACKENDS_CFILES = \ elf32-m68hc12.c \ elf32-m68hc1x.c \ elf32-m68k.c \ + elf32-s12z.c \ elf32-mcore.c \ elf32-mep.c \ elf32-metag.c \ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index ccd9ce1..88b6b8e 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -456,6 +456,7 @@ ALL_MACHINES = \ cpu-m68hc11.lo \ cpu-m68hc12.lo \ cpu-m9s12x.lo \ + cpu-s12z.lo \ cpu-m9s12xg.lo \ cpu-m68k.lo \ cpu-mcore.lo \ @@ -540,6 +541,7 @@ ALL_MACHINES_CFILES = \ cpu-m68hc11.c \ cpu-m68hc12.c \ cpu-m9s12x.c \ + cpu-s12z.c \ cpu-m9s12xg.c \ cpu-m68k.c \ cpu-mcore.c \ @@ -656,6 +658,7 @@ BFD32_BACKENDS = \ elf32-m68hc12.lo \ elf32-m68hc1x.lo \ elf32-m68k.lo \ + elf32-s12z.lo \ elf32-mcore.lo \ elf32-mep.lo \ elf32-metag.lo \ @@ -792,6 +795,7 @@ BFD32_BACKENDS_CFILES = \ elf32-m68hc12.c \ elf32-m68hc1x.c \ elf32-m68k.c \ + elf32-s12z.c \ elf32-mcore.c \ elf32-mep.c \ elf32-metag.c \ @@ -1253,6 +1257,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68k.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m9s12x.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m9s12xg.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-s12z.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mcore.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mep.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-metag.Plo@am__quote@ @@ -1344,6 +1349,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68hc12.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68hc1x.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68k.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-s12z.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-mcore.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-mep.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-metag.Plo@am__quote@ diff --git a/bfd/archures.c b/bfd/archures.c index 4c20664..3af7ddd 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -281,6 +281,8 @@ DESCRIPTION .#define bfd_mach_m6812s 2 . bfd_arch_m9s12x, {* Freescale S12X. *} . bfd_arch_m9s12xg, {* Freescale XGATE. *} +. bfd_arch_s12z, {* Freescale S12Z. *} +.#define bfd_mach_s12z_default 0 . bfd_arch_z8k, {* Zilog Z8000. *} .#define bfd_mach_z8001 1 .#define bfd_mach_z8002 2 @@ -590,6 +592,7 @@ extern const bfd_arch_info_type bfd_m68hc11_arch; extern const bfd_arch_info_type bfd_m68hc12_arch; extern const bfd_arch_info_type bfd_m9s12x_arch; extern const bfd_arch_info_type bfd_m9s12xg_arch; +extern const bfd_arch_info_type bfd_s12z_arch; extern const bfd_arch_info_type bfd_m68k_arch; extern const bfd_arch_info_type bfd_mcore_arch; extern const bfd_arch_info_type bfd_mep_arch; @@ -679,6 +682,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_m68hc12_arch, &bfd_m9s12x_arch, &bfd_m9s12xg_arch, + &bfd_s12z_arch, &bfd_m68k_arch, &bfd_mcore_arch, &bfd_mep_arch, diff --git a/bfd/bfd-in.h b/bfd/bfd-in.h index 50a8b52..481587e 100644 --- a/bfd/bfd-in.h +++ b/bfd/bfd-in.h @@ -581,6 +581,8 @@ void bfd_putb64 (bfd_uint64_t, void *); void bfd_putl64 (bfd_uint64_t, void *); void bfd_putb32 (bfd_vma, void *); void bfd_putl32 (bfd_vma, void *); +void bfd_putb24 (bfd_vma, void *); +void bfd_putl24 (bfd_vma, void *); void bfd_putb16 (bfd_vma, void *); void bfd_putl16 (bfd_vma, void *); diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 5f7ecd3..c64eee1 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -588,6 +588,8 @@ void bfd_putb64 (bfd_uint64_t, void *); void bfd_putl64 (bfd_uint64_t, void *); void bfd_putb32 (bfd_vma, void *); void bfd_putl32 (bfd_vma, void *); +void bfd_putb24 (bfd_vma, void *); +void bfd_putl24 (bfd_vma, void *); void bfd_putb16 (bfd_vma, void *); void bfd_putl16 (bfd_vma, void *); @@ -2149,6 +2151,8 @@ enum bfd_architecture #define bfd_mach_m6812s 2 bfd_arch_m9s12x, /* Freescale S12X. */ bfd_arch_m9s12xg, /* Freescale XGATE. */ + bfd_arch_s12z, /* Freescale S12Z. */ +#define bfd_mach_s12z_default 0 bfd_arch_z8k, /* Zilog Z8000. */ #define bfd_mach_z8001 1 #define bfd_mach_z8002 2 @@ -5253,6 +5257,11 @@ This is the 8 bit high part of an absolute address and immediately follows a matching LO8XG part. */ BFD_RELOC_M68HC12_HI8XG, +/* Freescale S12Z reloc. +This is a 15 bit relative address. If the most significant bits are all zero +then it may be truncated to 8 bits. */ + BFD_RELOC_S12Z_15_PCREL, + /* NS CR16C Relocations. */ BFD_RELOC_16C_NUM08, BFD_RELOC_16C_NUM08_C, diff --git a/bfd/config.bfd b/bfd/config.bfd index bbd4194..0db8ed4 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -179,6 +179,7 @@ lm32) targ_archs=bfd_lm32_arch ;; m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; m68*) targ_archs=bfd_m68k_arch ;; +s12z*) targ_archs=bfd_s12z_arch ;; microblaze*) targ_archs=bfd_microblaze_arch ;; mips*) targ_archs=bfd_mips_arch ;; nds32*) targ_archs=bfd_nds32_arch ;; @@ -814,6 +815,9 @@ case "${targ}" in targ_defvec=m68k_elf32_vec ;; + s12z-*-*) + targ_defvec=s12z_elf32_vec + ;; mcore-*-elf) targ_defvec=mcore_elf32_be_vec targ_selvecs="mcore_elf32_be_vec mcore_elf32_le_vec" diff --git a/bfd/configure b/bfd/configure index edc1de9..2f3dbe7 100755 --- a/bfd/configure +++ b/bfd/configure @@ -14465,6 +14465,7 @@ do m68hc11_elf32_vec) tb="$tb elf32-m68hc11.lo elf32-m68hc1x.lo elf32.lo $elf" ;; m68hc12_elf32_vec) tb="$tb elf32-m68hc12.lo elf32-m68hc1x.lo elf32.lo $elf" ;; m68k_elf32_vec) tb="$tb elf32-m68k.lo elf32.lo $elf" ;; + s12z_elf32_vec) tb="$tb elf32-s12z.lo elf32.lo $elf" ;; mach_o_be_vec) tb="$tb mach-o.lo dwarf2.lo" ;; mach_o_le_vec) tb="$tb mach-o.lo dwarf2.lo" ;; mach_o_fat_vec) tb="$tb mach-o.lo dwarf2.lo" ;; diff --git a/bfd/configure.ac b/bfd/configure.ac index 1297469..b320828 100644 --- a/bfd/configure.ac +++ b/bfd/configure.ac @@ -520,6 +520,7 @@ do m68hc11_elf32_vec) tb="$tb elf32-m68hc11.lo elf32-m68hc1x.lo elf32.lo $elf" ;; m68hc12_elf32_vec) tb="$tb elf32-m68hc12.lo elf32-m68hc1x.lo elf32.lo $elf" ;; m68k_elf32_vec) tb="$tb elf32-m68k.lo elf32.lo $elf" ;; + s12z_elf32_vec) tb="$tb elf32-s12z.lo elf32.lo $elf" ;; mach_o_be_vec) tb="$tb mach-o.lo dwarf2.lo" ;; mach_o_le_vec) tb="$tb mach-o.lo dwarf2.lo" ;; mach_o_fat_vec) tb="$tb mach-o.lo dwarf2.lo" ;; diff --git a/bfd/cpu-s12z.c b/bfd/cpu-s12z.c new file mode 100644 index 0000000..07bcb49 --- /dev/null +++ b/bfd/cpu-s12z.c @@ -0,0 +1,41 @@ +/* BFD support for the Freescale 9S12Z processor + Copyright (C) 2008-2018 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" + +const bfd_arch_info_type bfd_s12z_arch = +{ + 16, /* 16 bits in a word. */ + 24, /* 24 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_s12z, + 0, + "s12z", + "s12z", + 4, /* Section alignment power. */ + TRUE, + bfd_default_compatible, + bfd_default_scan, + bfd_arch_default_fill, + 0, +}; + diff --git a/bfd/elf32-s12z.c b/bfd/elf32-s12z.c new file mode 100644 index 0000000..4b638e6 --- /dev/null +++ b/bfd/elf32-s12z.c @@ -0,0 +1,270 @@ +/* Freescale S12Z-specific support for 32-bit ELF + Copyright (C) 1999-2018 Free Software Foundation, Inc. + (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com)) + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "bfdlink.h" +#include "libbfd.h" +#include "elf-bfd.h" + +#include "elf/s12z.h" + +/* Relocation functions. */ +static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup + (bfd *, bfd_reloc_code_real_type); +static bfd_boolean s12z_info_to_howto_rel + (bfd *, arelent *, Elf_Internal_Rela *); + +static bfd_reloc_status_type +shift_addend_reloc (bfd *abfd, arelent *reloc_entry, struct bfd_symbol *symbol ATTRIBUTE_UNUSED, + void *data ATTRIBUTE_UNUSED, asection *input_section ATTRIBUTE_UNUSED, + bfd *output ATTRIBUTE_UNUSED, char **msg ATTRIBUTE_UNUSED) +{ + /* This is a really peculiar reloc, which is done for compatibility + with the Freescale toolchain. + + That toolchain appears to (ab)use the lowest 15 bits of the addend for + the purpose of holding flags. The purpose of these flags are unknown. + So in this function, when writing the bfd we left shift the addend by + 15, and when reading we right shift it by 15 (discarding the lower bits). + + This allows the linker to work with object files generated by Freescale, + as well as by Gas. */ + + if (abfd->is_linker_input) + reloc_entry->addend >>= 15; + else + reloc_entry->addend <<= 15; + + return bfd_reloc_continue; +} + +#define USE_REL 0 + +static reloc_howto_type elf_s12z_howto_table[] = +{ + /* This reloc does nothing. */ + HOWTO (R_S12Z_NONE, /* type */ + 0, /* rightshift */ + 3, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_S12Z_NONE", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 24 bit absolute relocation emitted by the OPR mode operands */ + HOWTO (R_S12Z_OPR, /* type */ + 0, /* rightshift */ + 5, /* size (0 = byte, 1 = short, 2 = long) */ + 24, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + shift_addend_reloc, + "R_S12Z_OPR", /* name */ + FALSE, /* partial_inplace */ + 0x00ffffff, /* src_mask */ + 0x00ffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* The purpose of this reloc is not known */ + HOWTO (R_S12Z_UKNWN_2, /* type */ + 0, /* rightshift */ + 3, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_S12Z_UKNWN_2", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 15 bit PC-rel relocation */ + HOWTO (R_S12Z_PCREL_7_15, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 15, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + shift_addend_reloc, + "R_S12Z_PCREL_7_15", /* name */ + FALSE, /* partial_inplace */ + 0x00, /* src_mask */ + 0x007fff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* A 24 bit absolute relocation emitted by EXT24 mode operands */ + HOWTO (R_S12Z_EXT24, /* type */ + 0, /* rightshift */ + 5, /* size (0 = byte, 1 = short, 2 = long) */ + 24, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_S12Z_EXT24", /* name */ + FALSE, /* partial_inplace */ + 0x00ffffff, /* src_mask */ + 0x00ffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* The purpose of this reloc is not known */ + HOWTO (R_S12Z_UKNWN_3, /* type */ + 0, /* rightshift */ + 3, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_S12Z_UKNWN_3", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 32 bit absolute relocation */ + HOWTO (R_S12Z_EXT32, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_S12Z_EXT32", /* name */ + FALSE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ +}; + +/* Map BFD reloc types to S12Z ELF reloc types. */ + +struct s12z_reloc_map +{ + bfd_reloc_code_real_type bfd_reloc_val; + unsigned char elf_reloc_val; +}; + +static const struct s12z_reloc_map s12z_reloc_map[] = +{ + /* bfd reloc val */ /* elf reloc val */ + {BFD_RELOC_NONE, R_S12Z_NONE}, + {BFD_RELOC_32, R_S12Z_EXT32}, + {BFD_RELOC_24, R_S12Z_EXT24}, + {BFD_RELOC_16_PCREL, R_S12Z_PCREL_7_15} +}; + +static reloc_howto_type * +bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ + unsigned int i; + + for (i = 0; + i < sizeof (s12z_reloc_map) / sizeof (struct s12z_reloc_map); + i++) + { + if (s12z_reloc_map[i].bfd_reloc_val == code) + { + return &elf_s12z_howto_table[s12z_reloc_map[i].elf_reloc_val]; + } + } + + printf ("%s:%d Not found type %d\n", __FILE__, __LINE__, code); + + return NULL; +} + +static reloc_howto_type * +bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *r_name) +{ + unsigned int i; + + printf ("%s:%d Looking up %s\n", __FILE__, __LINE__, r_name); + + for (i = 0; + i < (sizeof (elf_s12z_howto_table) + / sizeof (elf_s12z_howto_table[0])); + i++) + if (elf_s12z_howto_table[i].name != NULL + && strcasecmp (elf_s12z_howto_table[i].name, r_name) == 0) + return &elf_s12z_howto_table[i]; + + return NULL; +} + +/* Set the howto pointer for an S12Z ELF reloc. */ + +static bfd_boolean +s12z_info_to_howto_rel (bfd *abfd, + arelent *cache_ptr, Elf_Internal_Rela *dst) +{ + unsigned int r_type = ELF32_R_TYPE (dst->r_info); + + if (r_type >= (unsigned int) R_S12Z_max) + { + /* xgettext:c-format */ + _bfd_error_handler (_("%pB: unsupported relocation type %#x"), + abfd, r_type); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + + cache_ptr->howto = &elf_s12z_howto_table[r_type]; + return TRUE; +} + +static bfd_boolean +s12z_elf_set_mach_from_flags (bfd *abfd) +{ + bfd_default_set_arch_mach (abfd, bfd_arch_s12z, 0); // bfd_mach_s12z); + + return TRUE; +} + +#define ELF_ARCH bfd_arch_s12z +#define ELF_TARGET_ID 0 +#define ELF_MACHINE_CODE EM_S12Z +#define ELF_MAXPAGESIZE 0x1000 + +#define TARGET_BIG_SYM s12z_elf32_vec +#define TARGET_BIG_NAME "elf32-s12z" + +#define elf_info_to_howto NULL +#define elf_info_to_howto_rel s12z_info_to_howto_rel +#define elf_backend_object_p s12z_elf_set_mach_from_flags +#define elf_backend_final_write_processing NULL +#define elf_backend_can_gc_sections 1 + +#include "elf32-target.h" diff --git a/bfd/libbfd.c b/bfd/libbfd.c index c581238..971be4f 100644 --- a/bfd/libbfd.c +++ b/bfd/libbfd.c @@ -613,6 +613,27 @@ bfd_putl16 (bfd_vma data, void *p) addr[1] = (data >> 8) & 0xff; } + +void +bfd_putb24 (bfd_vma data, void *p) +{ + bfd_byte *addr = (bfd_byte *) p; + addr[0] = (data >> 16) & 0xff; + addr[1] = (data >> 8) & 0xff; + addr[2] = data & 0xff; +} + + +void +bfd_putl24 (bfd_vma data, void *p) +{ + bfd_byte *addr = (bfd_byte *) p; + addr[0] = data & 0xff; + addr[1] = (data >> 8) & 0xff; + addr[2] = (data >> 16) & 0xff; +} + + bfd_vma bfd_getb32 (const void *p) { diff --git a/bfd/libbfd.h b/bfd/libbfd.h index e8c0fd8..b810c40 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -2513,6 +2513,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_M68HC12_10_PCREL", "BFD_RELOC_M68HC12_LO8XG", "BFD_RELOC_M68HC12_HI8XG", + "BFD_RELOC_S12Z_15_PCREL", "BFD_RELOC_16C_NUM08", "BFD_RELOC_16C_NUM08_C", "BFD_RELOC_16C_NUM16", diff --git a/bfd/reloc.c b/bfd/reloc.c index f7e34a9..411f998 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -431,6 +431,7 @@ bfd_get_reloc_size (reloc_howto_type *howto) { switch (howto->size) { + case 5: return 3; case 0: return 1; case 1: return 2; case 2: return 4; @@ -917,6 +918,16 @@ space consuming. For each target: switch (howto->size) { + case 5: + { + long x = bfd_get_32 (abfd, (bfd_byte *) data + octets); + x >>= 8; + DOIT (x); + bfd_put_16 (abfd, (bfd_vma) (x >> 8), (bfd_byte *) data + octets); + bfd_put_8 (abfd, (x & 0xFF), (unsigned char *) data + 2 + octets); + } + break; + case 0: { char x = bfd_get_8 (abfd, (char *) data + octets); @@ -5949,6 +5960,12 @@ ENUMDOC This is the 8 bit high part of an absolute address and immediately follows a matching LO8XG part. ENUM + BFD_RELOC_S12Z_15_PCREL +ENUMDOC + Freescale S12Z reloc. + This is a 15 bit relative address. If the most significant bits are all zero + then it may be truncated to 8 bits. +ENUM BFD_RELOC_16C_NUM08 ENUMX BFD_RELOC_16C_NUM08_C diff --git a/bfd/targets.c b/bfd/targets.c index 5d78f57..5a2a684 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -684,6 +684,7 @@ extern const bfd_target m32r_elf32_linux_le_vec; extern const bfd_target m68hc11_elf32_vec; extern const bfd_target m68hc12_elf32_vec; extern const bfd_target m68k_elf32_vec; +extern const bfd_target s12z_elf32_vec; extern const bfd_target mach_o_be_vec; extern const bfd_target mach_o_le_vec; extern const bfd_target mach_o_fat_vec; @@ -1044,6 +1045,8 @@ static const bfd_target * const _bfd_target_vector[] = &m68k_elf32_vec, + &s12z_elf32_vec, + &mach_o_be_vec, &mach_o_le_vec, &mach_o_fat_vec, |