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authorJames Lemke <jwlemke@codesourcery.com>2012-05-14 19:45:30 +0000
committerJames Lemke <jwlemke@codesourcery.com>2012-05-14 19:45:30 +0000
commitb9c361e0ad33f2c841067fd4bf0959a72ad5a265 (patch)
tree6c74713fae9f2fadf8c8767479344b2f14676c79 /bfd
parentac1438b5c566f160e55f16385624c736c3679f8c (diff)
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Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog50
-rw-r--r--bfd/archures.c1
-rw-r--r--bfd/bfd-in2.h33
-rw-r--r--bfd/bfd.c4
-rw-r--r--bfd/cpu-powerpc.c17
-rw-r--r--bfd/ecoff.c2
-rw-r--r--bfd/elf-bfd.h7
-rw-r--r--bfd/elf32-ppc.c634
-rw-r--r--bfd/elf32-ppc.h4
-rw-r--r--bfd/elflink.c104
-rw-r--r--bfd/libbfd-in.h2
-rw-r--r--bfd/libbfd.h23
-rw-r--r--bfd/reloc.c47
-rw-r--r--bfd/section.c6
-rw-r--r--bfd/targets.c5
15 files changed, 855 insertions, 84 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index e958f63..be53666 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,53 @@
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+ Catherine Moore <clm@codesourcery.com>
+
+ * bfd.c (bfd_lookup_section_flags): Add section parm.
+ * ecoff.c (bfd_debug_section): Remove flag_info initializer.
+ * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
+ (bfd_elf_lookup_section_flags): Add section parm.
+ * elf32-ppc.c (is_ppc_vle): New function.
+ (ppc_elf_modify_segment_map): New function.
+ (elf_backend_modify_segment_map): Define.
+ (has_vle_insns): New define.
+ * elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
+ * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
+ Move in logic to omit / include a section.
+ * libbfd-in.h (bfd_link_info): Add section parm.
+ (bfd_generic_lookup_section_flags): Likewise.
+ * reloc.c (bfd_generic_lookup_section_flags): Likewise.
+ * section.c (bfd_section): Move out section_flag_info.
+ (BFD_FAKE_SECTION): Remove flag_info initializer.
+ * targets.c (_bfd_lookup_section_flags): Add section parm.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+
+ * archures.c (bfd_mach_ppc_vle): New.
+ * bfd-in2.h: Regenerated.
+ * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
+ * elf32-ppc.c (split16_format_type): New enumeration.
+ (ppc_elf_vle_split16): New function.
+ (HOWTO): Add entries for R_PPC_VLE relocations.
+ (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
+ (ppc_elf_section_flags): New function.
+ (ppc_elf_lookup_section_flags): New function.
+ (ppc_elf_section_processing): New function.
+ (ppc_elf_check_relocs): Handle PPC_VLE relocations.
+ (ppc_elf_relocation_section): Likewise.
+ (elf_backend_lookup_section_flags_hook): Define.
+ (elf_backend_section_flags): Define.
+ (elf_backend_section_processing): Define.
+ * elf32-ppc.h (ppc_elf_section_processing): Declare.
+ * libbfd.h: Regenerated.
+ * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
+ BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
+ BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
+ BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
+ BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
+ BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
+ BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
+
2012-05-11 Georg-Johann Lay <avr@gjlay.de
PR target/13503
diff --git a/bfd/archures.c b/bfd/archures.c
index b64e110..c6f1c2a 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -244,6 +244,7 @@ DESCRIPTION
.#define bfd_mach_ppc_e5500 5006
.#define bfd_mach_ppc_e6500 5007
.#define bfd_mach_ppc_titan 83
+.#define bfd_mach_ppc_vle 84
. bfd_arch_rs6000, {* IBM RS/6000 *}
.#define bfd_mach_rs6k 6000
.#define bfd_mach_rs6k_rs1 6001
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index a087115..8e6ff42 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1512,9 +1512,6 @@ typedef struct bfd_section
/* The BFD which owns the section. */
bfd *owner;
- /* INPUT_SECTION_FLAGS if specified in the linker script. */
- struct flag_info *section_flag_info;
-
/* A symbol which points at this section only. */
struct bfd_symbol *symbol;
struct bfd_symbol **symbol_ptr_ptr;
@@ -1690,9 +1687,6 @@ extern asection std_section[4];
/* target_index, used_by_bfd, constructor_chain, owner, */ \
0, NULL, NULL, NULL, \
\
- /* flag_info, */ \
- NULL, \
- \
/* symbol, symbol_ptr_ptr, */ \
(struct bfd_symbol *) SYM, &SEC.symbol, \
\
@@ -1942,6 +1936,7 @@ enum bfd_architecture
#define bfd_mach_ppc_e5500 5006
#define bfd_mach_ppc_e6500 5007
#define bfd_mach_ppc_titan 83
+#define bfd_mach_ppc_vle 84
bfd_arch_rs6000, /* IBM RS/6000 */
#define bfd_mach_rs6k 6000
#define bfd_mach_rs6k_rs1 6001
@@ -3095,6 +3090,23 @@ instruction. */
BFD_RELOC_PPC_EMB_RELST_HA,
BFD_RELOC_PPC_EMB_BIT_FLD,
BFD_RELOC_PPC_EMB_RELSDA,
+ BFD_RELOC_PPC_VLE_REL8,
+ BFD_RELOC_PPC_VLE_REL15,
+ BFD_RELOC_PPC_VLE_REL24,
+ BFD_RELOC_PPC_VLE_LO16A,
+ BFD_RELOC_PPC_VLE_LO16D,
+ BFD_RELOC_PPC_VLE_HI16A,
+ BFD_RELOC_PPC_VLE_HI16D,
+ BFD_RELOC_PPC_VLE_HA16A,
+ BFD_RELOC_PPC_VLE_HA16D,
+ BFD_RELOC_PPC_VLE_SDA21,
+ BFD_RELOC_PPC_VLE_SDA21_LO,
+ BFD_RELOC_PPC_VLE_SDAREL_LO16A,
+ BFD_RELOC_PPC_VLE_SDAREL_LO16D,
+ BFD_RELOC_PPC_VLE_SDAREL_HI16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HI16D,
+ BFD_RELOC_PPC_VLE_SDAREL_HA16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HA16D,
BFD_RELOC_PPC64_HIGHER,
BFD_RELOC_PPC64_HIGHER_S,
BFD_RELOC_PPC64_HIGHEST,
@@ -5788,8 +5800,8 @@ bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags);
#define bfd_gc_sections(abfd, link_info) \
BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
-#define bfd_lookup_section_flags(link_info, flag_info) \
- BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info))
+#define bfd_lookup_section_flags(link_info, flag_info, section) \
+ BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info, section))
#define bfd_merge_sections(abfd, link_info) \
BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
@@ -6265,8 +6277,9 @@ typedef struct bfd_target
bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
/* Sets the bitmask of allowed and disallowed section flags. */
- void (*_bfd_lookup_section_flags) (struct bfd_link_info *,
- struct flag_info *);
+ bfd_boolean (*_bfd_lookup_section_flags) (struct bfd_link_info *,
+ struct flag_info *,
+ asection *);
/* Attempt to merge SEC_MERGE sections. */
bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
diff --git a/bfd/bfd.c b/bfd/bfd.c
index a1664b5..640b420 100644
--- a/bfd/bfd.c
+++ b/bfd/bfd.c
@@ -1456,8 +1456,8 @@ DESCRIPTION
.#define bfd_gc_sections(abfd, link_info) \
. BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
.
-.#define bfd_lookup_section_flags(link_info, flag_info) \
-. BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info))
+.#define bfd_lookup_section_flags(link_info, flag_info, section) \
+. BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info, section))
.
.#define bfd_merge_sections(abfd, link_info) \
. BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
diff --git a/bfd/cpu-powerpc.c b/bfd/cpu-powerpc.c
index 19604c3..5401235 100644
--- a/bfd/cpu-powerpc.c
+++ b/bfd/cpu-powerpc.c
@@ -376,6 +376,21 @@ const bfd_arch_info_type bfd_powerpc_archs[] =
&bfd_powerpc_archs[19]
},
{
+ 16, /* 16 or 32 bits in a word */
+ 32, /* 32 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_powerpc,
+ bfd_mach_ppc_vle,
+ "powerpc",
+ "powerpc:vle",
+ 3,
+ FALSE, /* not the default */
+ powerpc_compatible,
+ bfd_default_scan,
+ bfd_arch_default_fill,
+ &bfd_powerpc_archs[20]
+ },
+ {
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
@@ -388,7 +403,7 @@ const bfd_arch_info_type bfd_powerpc_archs[] =
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
- &bfd_powerpc_archs[20]
+ &bfd_powerpc_archs[21]
},
{
64, /* 64 bits in a word */
diff --git a/bfd/ecoff.c b/bfd/ecoff.c
index b76266d..efcb9bf 100644
--- a/bfd/ecoff.c
+++ b/bfd/ecoff.c
@@ -73,8 +73,6 @@ static asection bfd_debug_section =
0, NULL, 0,
/* target_index, used_by_bfd, constructor_chain, owner, */
0, NULL, NULL, NULL,
- /* flag_info, */
- NULL,
/* symbol, */
NULL,
/* symbol_ptr_ptr, */
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 5af46dc..b07d8c4 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -1367,6 +1367,9 @@ struct bfd_elf_section_data
/* The ELF header for this section. */
Elf_Internal_Shdr this_hdr;
+ /* INPUT_SECTION_FLAGS if specified in the linker script. */
+ struct flag_info *section_flag_info;
+
/* Information about the REL and RELA reloc sections associated
with this section, if any. */
struct bfd_elf_section_reloc_data rel, rela;
@@ -2207,8 +2210,8 @@ extern bfd_boolean _bfd_elf_maybe_function_sym (const asymbol *,
extern int bfd_elf_get_default_section_type (flagword);
-extern void bfd_elf_lookup_section_flags
- (struct bfd_link_info *, struct flag_info *);
+extern bfd_boolean bfd_elf_lookup_section_flags
+ (struct bfd_link_info *, struct flag_info *, asection *);
extern Elf_Internal_Phdr * _bfd_elf_find_segment_containing_section
(bfd * abfd, asection * section);
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index 5716b82..e8f8db8 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -38,12 +38,21 @@
#include "elf-vxworks.h"
#include "dwarf2.h"
+typedef enum split16_format_type
+{
+ split16a_type = 0,
+ split16d_type
+}
+split16_format_type;
+
/* RELA relocations are used here. */
static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type ppc_elf_unhandled_reloc
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
+static void ppc_elf_vle_split16
+ (bfd *, bfd_byte *, bfd_vma, bfd_vma, split16_format_type);
/* Branch prediction bit for branch taken relocs. */
#define BRANCH_PREDICT_BIT 0x200000
@@ -1392,6 +1401,262 @@ static reloc_howto_type ppc_elf_howto_raw[] = {
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
+ /* A relative 8 bit branch. */
+ HOWTO (R_PPC_VLE_REL8, /* type */
+ 1, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_REL8", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A relative 15 bit branch. */
+ HOWTO (R_PPC_VLE_REL15, /* type */
+ 1, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 15, /* bitsize */
+ TRUE, /* pc_relative */
+ 1, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_REL15", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfe, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A relative 24 bit branch. */
+ HOWTO (R_PPC_VLE_REL24, /* type */
+ 1, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 24, /* bitsize */
+ TRUE, /* pc_relative */
+ 1, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_REL24", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1fffffe, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* The 16 LSBS in split16a format. */
+ HOWTO (R_PPC_VLE_LO16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */ /* FIXME: Does this apply to split relocs? */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_LO16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* The 16 LSBS in split16d format. */
+ HOWTO (R_PPC_VLE_LO16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_LO16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 split16a format. */
+ HOWTO (R_PPC_VLE_HI16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HI16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 split16d format. */
+ HOWTO (R_PPC_VLE_HI16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HI16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (High Adjusted) in split16a format. */
+ HOWTO (R_PPC_VLE_HA16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HA16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (High Adjusted) in split16d format. */
+ HOWTO (R_PPC_VLE_HA16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HA16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* This reloc does nothing. */
+ HOWTO (R_PPC_VLE_SDA21, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDA21", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* This reloc does nothing. */
+ HOWTO (R_PPC_VLE_SDA21_LO, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDA21_LO", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
+ HOWTO (R_PPC_VLE_SDAREL_LO16A,/* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_LO16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
+ /* This reloc does nothing. */
+ HOWTO (R_PPC_VLE_SDAREL_LO16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_LO16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
+ HOWTO (R_PPC_VLE_SDAREL_HI16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HI16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
+ HOWTO (R_PPC_VLE_SDAREL_HI16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HI16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
+ HOWTO (R_PPC_VLE_SDAREL_HA16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HA16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
+ HOWTO (R_PPC_VLE_SDAREL_HA16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HA16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
HOWTO (R_PPC_IRELATIVE, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
@@ -1628,6 +1893,35 @@ ppc_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
case BFD_RELOC_PPC_EMB_RELST_HA: r = R_PPC_EMB_RELST_HA; break;
case BFD_RELOC_PPC_EMB_BIT_FLD: r = R_PPC_EMB_BIT_FLD; break;
case BFD_RELOC_PPC_EMB_RELSDA: r = R_PPC_EMB_RELSDA; break;
+ case BFD_RELOC_PPC_VLE_REL8: r = R_PPC_VLE_REL8; break;
+ case BFD_RELOC_PPC_VLE_REL15: r = R_PPC_VLE_REL15; break;
+ case BFD_RELOC_PPC_VLE_REL24: r = R_PPC_VLE_REL24; break;
+ case BFD_RELOC_PPC_VLE_LO16A: r = R_PPC_VLE_LO16A; break;
+ case BFD_RELOC_PPC_VLE_LO16D: r = R_PPC_VLE_LO16D; break;
+ case BFD_RELOC_PPC_VLE_HI16A: r = R_PPC_VLE_HI16A; break;
+ case BFD_RELOC_PPC_VLE_HI16D: r = R_PPC_VLE_HI16D; break;
+ case BFD_RELOC_PPC_VLE_HA16A: r = R_PPC_VLE_HA16A; break;
+ case BFD_RELOC_PPC_VLE_HA16D: r = R_PPC_VLE_HA16D; break;
+ case BFD_RELOC_PPC_VLE_SDA21: r = R_PPC_VLE_SDA21; break;
+ case BFD_RELOC_PPC_VLE_SDA21_LO: r = R_PPC_VLE_SDA21_LO; break;
+ case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
+ r = R_PPC_VLE_SDAREL_LO16A;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
+ r = R_PPC_VLE_SDAREL_LO16D;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
+ r = R_PPC_VLE_SDAREL_HI16A;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
+ r = R_PPC_VLE_SDAREL_HI16D;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
+ r = R_PPC_VLE_SDAREL_HA16A;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
+ r = R_PPC_VLE_SDAREL_HA16D;
+ break;
case BFD_RELOC_16_PCREL: r = R_PPC_REL16; break;
case BFD_RELOC_LO16_PCREL: r = R_PPC_REL16_LO; break;
case BFD_RELOC_HI16_PCREL: r = R_PPC_REL16_HI; break;
@@ -1800,6 +2094,26 @@ struct ppc_elf_obj_tdata
(bfd_get_flavour (bfd) == bfd_target_elf_flavour \
&& elf_object_id (bfd) == PPC32_ELF_DATA)
+/* Rename some of the generic section flags to better document how they
+ are used for ppc32. */
+
+/* Nonzero if this section has TLS related relocations. */
+#define has_tls_reloc sec_flg0
+
+/* Nonzero if this section has a call to __tls_get_addr. */
+#define has_tls_get_addr_call sec_flg1
+
+/* Nonzero if this secs_tls_get_addr_calltion has the VLE bit set. */
+#define has_vle_insns sec_flg2
+
+bfd_boolean
+is_ppc_vle (asection *sec)
+{
+ return (sec->owner != NULL
+ && is_ppc_elf (sec->owner)
+ && sec->has_vle_insns);
+}
+
/* Override the generic function because we store some extras. */
static bfd_boolean
@@ -1952,6 +2266,37 @@ ppc_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type, ...)
}
}
+static bfd_boolean
+ppc_elf_section_flags (flagword *flags ATTRIBUTE_UNUSED,
+ const Elf_Internal_Shdr *hdr)
+{
+ if (hdr->sh_flags & SHF_PPC_VLE)
+ hdr->bfd_section->has_vle_insns = 1;
+ return TRUE;
+}
+
+static flagword
+ppc_elf_lookup_section_flags (char *flag_name)
+{
+
+ if (!strcmp (flag_name, "SHF_PPC_VLE"))
+ return SHF_PPC_VLE;
+
+ return 0;
+}
+
+/* Add the VLE flag if required. */
+
+bfd_boolean
+ppc_elf_section_processing (bfd *abfd, Elf_Internal_Shdr *shdr)
+{
+ if (bfd_get_mach (abfd) == bfd_mach_ppc_vle
+ && (shdr->sh_flags & SHF_EXECINSTR) != 0)
+ shdr->sh_flags |= SHF_PPC_VLE;
+
+ return TRUE;
+}
+
/* Return address for Ith PLT stub in section PLT, for relocation REL
or (bfd_vma) -1 if it should not be included. */
@@ -2025,6 +2370,70 @@ ppc_elf_additional_program_headers (bfd *abfd,
return ret;
}
+/* Modify the segment map for VLE executables. */
+
+bfd_boolean
+ppc_elf_modify_segment_map (bfd *abfd,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED)
+{
+ struct elf_segment_map *m, *n;
+ bfd_size_type amt;
+ unsigned int j, k;
+ bfd_boolean sect0_vle, sectj_vle;
+
+ /* At this point in the link, output sections have already been sorted by
+ LMA and assigned to segments. All that is left to do is to ensure
+ there is no mixing of VLE & non-VLE sections in a text segment.
+ If we find that case, we split the segment.
+ We maintain the original output section order. */
+
+ for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
+ {
+ if (m->count == 0)
+ continue;
+
+ sect0_vle = is_ppc_vle (m->sections[0]);
+ for (j = 1; j < m->count; ++j)
+ {
+ if (is_ppc_vle (m->sections[j]) != sect0_vle)
+ break;
+ }
+ if (j >= m->count)
+ continue;
+
+ sectj_vle = is_ppc_vle (m->sections[j]);
+
+ /* sections 0..j-1 stay in this (current) segment,
+ the remainder are put in a new segment.
+ The scan resumes with the new segment. */
+
+ /* Fix the new segment. */
+ amt = sizeof (struct elf_segment_map);
+ amt += (m->count - j - 1) * sizeof (asection *);
+ n = (struct elf_segment_map *) bfd_zalloc (abfd, amt);
+ if (n == NULL)
+ return FALSE;
+
+ n->p_type = PT_LOAD;
+ n->p_flags = PF_X | PF_R;
+ if (sectj_vle)
+ n->p_flags |= PF_PPC_VLE;
+ n->count = m->count - j;
+ for (k = 0; k < n->count; ++k)
+ {
+ n->sections[k] = m->sections[j+k];
+ m->sections[j+k] = NULL;
+ }
+ n->next = m->next;
+ m->next = n;
+
+ /* Fix the current segment */
+ m->count = j;
+ }
+
+ return TRUE;
+}
+
/* Add extra PPC sections -- Note, for now, make .sbss2 and
.PPC.EMB.sbss0 a normal section, and not a bss section so
that the linker doesn't crater when trying to make more than
@@ -2731,15 +3140,6 @@ struct ppc_elf_link_hash_table
struct sym_cache sym_cache;
};
-/* Rename some of the generic section flags to better document how they
- are used here. */
-
-/* Nonzero if this section has TLS related relocations. */
-#define has_tls_reloc sec_flg0
-
-/* Nonzero if this section has a call to __tls_get_addr. */
-#define has_tls_get_addr_call sec_flg1
-
/* Get the PPC ELF linker hash table from a link_info structure. */
#define ppc_elf_hash_table(p) \
@@ -3620,10 +4020,21 @@ ppc_elf_check_relocs (bfd *abfd,
}
break;
+ case R_PPC_VLE_SDAREL_LO16A:
+ case R_PPC_VLE_SDAREL_LO16D:
+ case R_PPC_VLE_SDAREL_HI16A:
+ case R_PPC_VLE_SDAREL_HI16D:
+ case R_PPC_VLE_SDAREL_HA16A:
+ case R_PPC_VLE_SDAREL_HA16D:
case R_PPC_SDAREL16:
if (htab->sdata[0].sym == NULL
&& !create_sdata_sym (info, &htab->sdata[0]))
return FALSE;
+
+ if (htab->sdata[1].sym == NULL
+ && !create_sdata_sym (info, &htab->sdata[1]))
+ return FALSE;
+
if (h != NULL)
{
ppc_elf_hash_entry (h)->has_sda_refs = TRUE;
@@ -3631,6 +4042,17 @@ ppc_elf_check_relocs (bfd *abfd,
}
break;
+ case R_PPC_VLE_REL8:
+ case R_PPC_VLE_REL15:
+ case R_PPC_VLE_REL24:
+ case R_PPC_VLE_LO16A:
+ case R_PPC_VLE_LO16D:
+ case R_PPC_VLE_HI16A:
+ case R_PPC_VLE_HI16D:
+ case R_PPC_VLE_HA16A:
+ case R_PPC_VLE_HA16D:
+ break;
+
case R_PPC_EMB_SDA2REL:
if (info->shared)
{
@@ -3647,6 +4069,8 @@ ppc_elf_check_relocs (bfd *abfd,
}
break;
+ case R_PPC_VLE_SDA21_LO:
+ case R_PPC_VLE_SDA21:
case R_PPC_EMB_SDA21:
case R_PPC_EMB_RELSDA:
if (info->shared)
@@ -4244,6 +4668,24 @@ ppc_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
return TRUE;
}
+
+static void
+ppc_elf_vle_split16 (bfd *output_bfd, bfd_byte *contents,
+ bfd_vma offset, bfd_vma relocation,
+ split16_format_type split16_format)
+
+{
+ bfd_vma insn, top5, bottom11;
+
+ insn = bfd_get_32 (output_bfd, contents + offset);
+ top5 = relocation >> 11;
+ top5 = top5 << (split16_format == split16a_type ? 20 : 16);
+ bottom11 = relocation & 0x7ff;
+ insn |= top5;
+ insn |= bottom11;
+ bfd_put_32 (output_bfd, insn, contents + offset);
+}
+
/* Choose which PLT scheme to use, and set .plt flags appropriately.
Returns -1 on error, 0 for old PLT, 1 for new PLT. */
@@ -7611,6 +8053,9 @@ ppc_elf_relocate_section (bfd *output_bfd,
case R_PPC_UADDR16:
goto dodyn;
+ case R_PPC_VLE_REL8:
+ case R_PPC_VLE_REL15:
+ case R_PPC_VLE_REL24:
case R_PPC_REL24:
case R_PPC_REL14:
case R_PPC_REL14_BRTAKEN:
@@ -7984,9 +8429,53 @@ ppc_elf_relocate_section (bfd *output_bfd,
}
break;
+ case R_PPC_VLE_LO16A:
+ relocation = (relocation + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16a_type);
+ continue;
+
+ case R_PPC_VLE_LO16D:
+ relocation = (relocation + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16d_type);
+ continue;
+
+ case R_PPC_VLE_HI16A:
+ relocation = ((relocation + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16a_type);
+ continue;
+
+ case R_PPC_VLE_HI16D:
+ relocation = ((relocation + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16d_type);
+ continue;
+
+ case R_PPC_VLE_HA16A:
+ {
+ bfd_vma value = relocation + addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ continue;
+
+ case R_PPC_VLE_HA16D:
+ {
+ bfd_vma value = relocation + addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ continue;
+
/* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
case R_PPC_EMB_SDA21:
+ case R_PPC_VLE_SDA21:
case R_PPC_EMB_RELSDA:
+ case R_PPC_VLE_SDA21_LO:
{
const char *name;
int reg;
@@ -8043,7 +8532,25 @@ ppc_elf_relocate_section (bfd *output_bfd,
addend -= SYM_VAL (sda);
}
- if (r_type == R_PPC_EMB_SDA21)
+ if (reg == 0
+ && (r_type == R_PPC_VLE_SDA21
+ || r_type == R_PPC_VLE_SDA21_LO))
+ {
+ /* Use the split20 format. */
+ bfd_vma insn, bits12to15, bits21to31;
+ bfd_vma value = (relocation + rel->r_offset) & 0xffff;
+ /* Propagate sign bit, if necessary. */
+ insn = (value & 0x8000) ? 0x70107800 : 0x70000000;
+ bits12to15 = value & 0x700;
+ bits21to31 = value & 0x7ff;
+ insn |= bits12to15;
+ insn |= bits21to31;
+ bfd_put_32 (output_bfd, insn, contents + rel->r_offset);
+ continue;
+ }
+ else if (r_type == R_PPC_EMB_SDA21
+ || r_type == R_PPC_VLE_SDA21
+ || r_type == R_PPC_VLE_SDA21_LO)
{
bfd_vma insn; /* Fill in register field. */
@@ -8054,6 +8561,107 @@ ppc_elf_relocate_section (bfd *output_bfd,
}
break;
+ case R_PPC_VLE_SDAREL_LO16A:
+ case R_PPC_VLE_SDAREL_LO16D:
+ case R_PPC_VLE_SDAREL_HI16A:
+ case R_PPC_VLE_SDAREL_HI16D:
+ case R_PPC_VLE_SDAREL_HA16A:
+ case R_PPC_VLE_SDAREL_HA16D:
+ {
+ bfd_vma value;
+ const char *name;
+ //int reg;
+ struct elf_link_hash_entry *sda = NULL;
+
+ if (sec == NULL || sec->output_section == NULL)
+ {
+ unresolved_reloc = TRUE;
+ break;
+ }
+
+ name = bfd_get_section_name (abfd, sec->output_section);
+ if (((CONST_STRNEQ (name, ".sdata")
+ && (name[6] == 0 || name[6] == '.'))
+ || (CONST_STRNEQ (name, ".sbss")
+ && (name[5] == 0 || name[5] == '.'))))
+ {
+ //reg = 13;
+ sda = htab->sdata[0].sym;
+ }
+ else if (CONST_STRNEQ (name, ".sdata2")
+ || CONST_STRNEQ (name, ".sbss2"))
+ {
+ //reg = 2;
+ sda = htab->sdata[1].sym;
+ }
+ else
+ {
+ (*_bfd_error_handler)
+ (_("%B: the target (%s) of a %s relocation is "
+ "in the wrong output section (%s)"),
+ input_bfd,
+ sym_name,
+ howto->name,
+ name);
+
+ bfd_set_error (bfd_error_bad_value);
+ ret = FALSE;
+ continue;
+ }
+
+ if (sda != NULL)
+ {
+ if (!is_static_defined (sda))
+ {
+ unresolved_reloc = TRUE;
+ break;
+ }
+ }
+
+ value = sda->root.u.def.section->output_section->vma
+ + sda->root.u.def.section->output_offset;
+
+ if (r_type == R_PPC_VLE_SDAREL_LO16A)
+ {
+ value = (value + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_LO16D)
+ {
+ value = (value + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HI16A)
+ {
+ value = ((value + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HI16D)
+ {
+ value = ((value + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HA16A)
+ {
+ value += addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HA16D)
+ {
+ value += addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ }
+ continue;
+
/* Relocate against the beginning of the section. */
case R_PPC_SECTOFF:
case R_PPC_SECTOFF_LO:
@@ -9092,7 +9700,7 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
#define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
#define bfd_elf32_bfd_relax_section ppc_elf_relax_section
#define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
-#define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
+#define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
#define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
#define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
#define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
@@ -9113,6 +9721,7 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
#define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
#define elf_backend_fake_sections ppc_elf_fake_sections
#define elf_backend_additional_program_headers ppc_elf_additional_program_headers
+#define elf_backend_modify_segment_map ppc_elf_modify_segment_map
#define elf_backend_grok_prstatus ppc_elf_grok_prstatus
#define elf_backend_grok_psinfo ppc_elf_grok_psinfo
#define elf_backend_write_core_note ppc_elf_write_core_note
@@ -9125,6 +9734,9 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
#define elf_backend_action_discarded ppc_elf_action_discarded
#define elf_backend_init_index_section _bfd_elf_init_1_index_section
#define elf_backend_post_process_headers _bfd_elf_set_osabi
+#define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
+#define elf_backend_section_flags ppc_elf_section_flags
+#define elf_backend_section_processing ppc_elf_section_processing
#include "elf32-target.h"
diff --git a/bfd/elf32-ppc.h b/bfd/elf32-ppc.h
index 4becb30..502014d 100644
--- a/bfd/elf32-ppc.h
+++ b/bfd/elf32-ppc.h
@@ -26,8 +26,12 @@ enum ppc_elf_plt_type
PLT_VXWORKS
};
+bfd_boolean is_ppc_vle (asection *);
int ppc_elf_select_plt_layout (bfd *, struct bfd_link_info *,
enum ppc_elf_plt_type, int);
asection *ppc_elf_tls_setup (bfd *, struct bfd_link_info *, int);
bfd_boolean ppc_elf_tls_optimize (bfd *, struct bfd_link_info *);
void ppc_elf_set_sdata_syms (bfd *, struct bfd_link_info *);
+extern bfd_boolean ppc_elf_modify_segment_map (bfd *,
+ struct bfd_link_info * ATTRIBUTE_UNUSED);
+extern bfd_boolean ppc_elf_section_processing (bfd *, Elf_Internal_Shdr *);
diff --git a/bfd/elflink.c b/bfd/elflink.c
index 65d3a2c..099db96 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -12220,58 +12220,84 @@ static elf_flags_to_name_table elf_flags_to_names [] =
{ "SHF_EXCLUDE", SHF_EXCLUDE },
};
-void
+/* Returns TRUE if the section is to be included, otherwise FALSE. */
+bfd_boolean
bfd_elf_lookup_section_flags (struct bfd_link_info *info,
- struct flag_info *flaginfo)
+ struct flag_info *finfo,
+ asection *section)
{
- bfd *output_bfd = info->output_bfd;
- const struct elf_backend_data *bed = get_elf_backend_data (output_bfd);
- struct flag_info_list *tf = flaginfo->flag_list;
- int with_hex = 0;
- int without_hex = 0;
+ const bfd_vma sh_flags = elf_section_flags(section);
- for (tf = flaginfo->flag_list; tf != NULL; tf = tf->next)
+ if (finfo->flags_initialized == FALSE)
{
- int i;
- if (bed->elf_backend_lookup_section_flags_hook)
+ const struct elf_backend_data *bed =
+ get_elf_backend_data (info->output_bfd);
+ struct flag_info_list *tf = finfo->flag_list;
+ int with_hex = 0;
+ int without_hex = 0;
+
+ for (tf = finfo->flag_list; tf != NULL; tf = tf->next)
{
- flagword hexval =
- (*bed->elf_backend_lookup_section_flags_hook) ((char *) tf->name);
+ unsigned i;
- if (hexval != 0)
+ if (bed->elf_backend_lookup_section_flags_hook)
{
- if (tf->with == with_flags)
- with_hex |= hexval;
- else if (tf->with == without_flags)
- without_hex |= hexval;
- tf->valid = TRUE;
- continue;
+ flagword hexval =
+ (*bed->elf_backend_lookup_section_flags_hook) ((char*)tf->name);
+
+ if (hexval != 0)
+ {
+ if (tf->with == with_flags)
+ with_hex |= hexval;
+ else if (tf->with == without_flags)
+ without_hex |= hexval;
+ tf->valid = TRUE;
+ continue;
+ }
}
- }
- for (i = 0; i < 12; i++)
- {
- if (!strcmp (tf->name, elf_flags_to_names[i].flag_name))
+ for (i = 0;
+ i < sizeof(elf_flags_to_names) / sizeof(elf_flags_to_name_table);
+ ++i)
{
- if (tf->with == with_flags)
- with_hex |= elf_flags_to_names[i].flag_value;
- else if (tf->with == without_flags)
- without_hex |= elf_flags_to_names[i].flag_value;
- tf->valid = TRUE;
- continue;
+ if (!strcmp (tf->name, elf_flags_to_names[i].flag_name))
+ {
+ if (tf->with == with_flags)
+ with_hex |= elf_flags_to_names[i].flag_value;
+ else if (tf->with == without_flags)
+ without_hex |= elf_flags_to_names[i].flag_value;
+ tf->valid = TRUE;
+ break;
+ }
+ }
+ if (tf->valid == FALSE)
+ {
+ info->callbacks->einfo
+ (_("Unrecognized INPUT_SECTION_FLAG %s\n"), tf->name);
+ return FALSE;
}
}
- if (tf->valid == FALSE)
- {
- info->callbacks->einfo
- (_("Unrecognized INPUT_SECTION_FLAG %s\n"), tf->name);
- return;
- }
+ finfo->flags_initialized = TRUE;
+ finfo->only_with_flags |= with_hex;
+ finfo->not_with_flags |= without_hex;
}
- flaginfo->flags_initialized = TRUE;
- flaginfo->only_with_flags |= with_hex;
- flaginfo->not_with_flags |= without_hex;
- return;
+ if (finfo->only_with_flags != 0
+ && finfo->not_with_flags != 0
+ && ((finfo->not_with_flags & sh_flags) != 0
+ || (finfo->only_with_flags & sh_flags)
+ != finfo->only_with_flags))
+ return FALSE;
+
+ if (finfo->only_with_flags != 0
+ && (finfo->only_with_flags & sh_flags)
+ != finfo->only_with_flags)
+ return FALSE;
+
+ if (finfo->not_with_flags != 0
+ && (finfo->not_with_flags & sh_flags) != 0)
+ return FALSE;
+
+ return TRUE;
}
struct alloc_got_off_arg {
diff --git a/bfd/libbfd-in.h b/bfd/libbfd-in.h
index 45f0b0c..baffaea 100644
--- a/bfd/libbfd-in.h
+++ b/bfd/libbfd-in.h
@@ -459,7 +459,7 @@ extern bfd_boolean _bfd_generic_set_section_contents
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
bfd_false)
#define _bfd_nolink_bfd_lookup_section_flags \
- ((void (*) (struct bfd_link_info *, struct flag_info *)) \
+ ((bfd_boolean (*) (struct bfd_link_info *, struct flag_info *, asection *)) \
bfd_0)
#define _bfd_nolink_bfd_merge_sections \
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 026b077..94fb0a1 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -464,7 +464,7 @@ extern bfd_boolean _bfd_generic_set_section_contents
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
bfd_false)
#define _bfd_nolink_bfd_lookup_section_flags \
- ((void (*) (struct bfd_link_info *, struct flag_info *)) \
+ ((bfd_boolean (*) (struct bfd_link_info *, struct flag_info *, asection *)) \
bfd_0)
#define _bfd_nolink_bfd_merge_sections \
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
@@ -1343,6 +1343,23 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_PPC_EMB_RELST_HA",
"BFD_RELOC_PPC_EMB_BIT_FLD",
"BFD_RELOC_PPC_EMB_RELSDA",
+ "BFD_RELOC_PPC_VLE_REL8",
+ "BFD_RELOC_PPC_VLE_REL15",
+ "BFD_RELOC_PPC_VLE_REL24",
+ "BFD_RELOC_PPC_VLE_LO16A",
+ "BFD_RELOC_PPC_VLE_LO16D",
+ "BFD_RELOC_PPC_VLE_HI16A",
+ "BFD_RELOC_PPC_VLE_HI16D",
+ "BFD_RELOC_PPC_VLE_HA16A",
+ "BFD_RELOC_PPC_VLE_HA16D",
+ "BFD_RELOC_PPC_VLE_SDA21",
+ "BFD_RELOC_PPC_VLE_SDA21_LO",
+ "BFD_RELOC_PPC_VLE_SDAREL_LO16A",
+ "BFD_RELOC_PPC_VLE_SDAREL_LO16D",
+ "BFD_RELOC_PPC_VLE_SDAREL_HI16A",
+ "BFD_RELOC_PPC_VLE_SDAREL_HI16D",
+ "BFD_RELOC_PPC_VLE_SDAREL_HA16A",
+ "BFD_RELOC_PPC_VLE_SDAREL_HA16D",
"BFD_RELOC_PPC64_HIGHER",
"BFD_RELOC_PPC64_HIGHER_S",
"BFD_RELOC_PPC64_HIGHEST",
@@ -2586,8 +2603,8 @@ bfd_boolean bfd_generic_relax_section
bfd_boolean bfd_generic_gc_sections
(bfd *, struct bfd_link_info *);
-void bfd_generic_lookup_section_flags
- (struct bfd_link_info *, struct flag_info *);
+bfd_boolean bfd_generic_lookup_section_flags
+ (struct bfd_link_info *, struct flag_info *, asection *);
bfd_boolean bfd_generic_merge_sections
(bfd *, struct bfd_link_info *);
diff --git a/bfd/reloc.c b/bfd/reloc.c
index e5dd8bc..a9fd397 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2806,6 +2806,40 @@ ENUMX
ENUMX
BFD_RELOC_PPC_EMB_RELSDA
ENUMX
+ BFD_RELOC_PPC_VLE_REL8
+ENUMX
+ BFD_RELOC_PPC_VLE_REL15
+ENUMX
+ BFD_RELOC_PPC_VLE_REL24
+ENUMX
+ BFD_RELOC_PPC_VLE_LO16A
+ENUMX
+ BFD_RELOC_PPC_VLE_LO16D
+ENUMX
+ BFD_RELOC_PPC_VLE_HI16A
+ENUMX
+ BFD_RELOC_PPC_VLE_HI16D
+ENUMX
+ BFD_RELOC_PPC_VLE_HA16A
+ENUMX
+ BFD_RELOC_PPC_VLE_HA16D
+ENUMX
+ BFD_RELOC_PPC_VLE_SDA21
+ENUMX
+ BFD_RELOC_PPC_VLE_SDA21_LO
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_LO16A
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_LO16D
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HI16A
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HI16D
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HA16A
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HA16D
+ENUMX
BFD_RELOC_PPC64_HIGHER
ENUMX
BFD_RELOC_PPC64_HIGHER_S
@@ -6349,23 +6383,26 @@ INTERNAL_FUNCTION
bfd_generic_lookup_section_flags
SYNOPSIS
- void bfd_generic_lookup_section_flags
- (struct bfd_link_info *, struct flag_info *);
+ bfd_boolean bfd_generic_lookup_section_flags
+ (struct bfd_link_info *, struct flag_info *, asection *);
DESCRIPTION
Provides default handling for section flags lookup
-- i.e., does nothing.
+ Returns FALSE if the section should be omitted, otherwise TRUE.
*/
-void
+bfd_boolean
bfd_generic_lookup_section_flags (struct bfd_link_info *info ATTRIBUTE_UNUSED,
- struct flag_info *flaginfo)
+ struct flag_info *flaginfo,
+ asection *section ATTRIBUTE_UNUSED)
{
if (flaginfo != NULL)
{
(*_bfd_error_handler) (_("INPUT_SECTION_FLAGS are not supported.\n"));
- return;
+ return FALSE;
}
+ return TRUE;
}
/*
diff --git a/bfd/section.c b/bfd/section.c
index db7e239..3a70ccf 100644
--- a/bfd/section.c
+++ b/bfd/section.c
@@ -517,9 +517,6 @@ CODE_FRAGMENT
. {* The BFD which owns the section. *}
. bfd *owner;
.
-. {* INPUT_SECTION_FLAGS if specified in the linker script. *}
-. struct flag_info *section_flag_info;
-.
. {* A symbol which points at this section only. *}
. struct bfd_symbol *symbol;
. struct bfd_symbol **symbol_ptr_ptr;
@@ -695,9 +692,6 @@ CODE_FRAGMENT
. {* target_index, used_by_bfd, constructor_chain, owner, *} \
. 0, NULL, NULL, NULL, \
. \
-. {* flag_info, *} \
-. NULL, \
-. \
. {* symbol, symbol_ptr_ptr, *} \
. (struct bfd_symbol *) SYM, &SEC.symbol, \
. \
diff --git a/bfd/targets.c b/bfd/targets.c
index f94fed5..cfa91a8 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -497,8 +497,9 @@ BFD_JUMP_TABLE macros.
. bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
.
. {* Sets the bitmask of allowed and disallowed section flags. *}
-. void (*_bfd_lookup_section_flags) (struct bfd_link_info *,
-. struct flag_info *);
+. bfd_boolean (*_bfd_lookup_section_flags) (struct bfd_link_info *,
+. struct flag_info *,
+. asection *);
.
. {* Attempt to merge SEC_MERGE sections. *}
. bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);