bfd: add AMDGCN architecture

Add support for the AMDGCN architecture to BFD.

This is the bare minimum to get

  $ ./configure --target=amdgcn-hsa-amdhsa --disable-gas
  $ make all-binutils

working later in this series.

The specific AMDGCN models added here are a bit arbitrary, based on
what we intend to initially support in GDB.  This list will need to be
updated in the future anyway.  The complete up-to-date list of existing
AMDGPU models can be found here:

  https://llvm.org/docs/AMDGPUUsage.html#processors

The ELF format for this architecture is documented here:

  https://llvm.org/docs/AMDGPUUsage.html#elf-code-object

The flags for the "HSA" OS ABI are properly versioned and documented on
that page.  But the NONE, PAL and MESA3D OS ABIs are not well documented
nor versioned.  Taking a peek at the LLVM source code, we see that they
encode their flags the same way as HSA v3.  For example, for PAL:

  https://github.com/llvm/llvm-project/blob/c8b614cd74a92d85936aed5ac7c642af75ffdc29/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp#L601

So at least, we know that all AMDGPU objects (of which AMDGCN objects
are a subset of) at the time of writing encode the specific GPU model in
the EF_AMDGPU_MACH field of e_flags.

bfd/ChangeLog:

	* Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES):
	Add cpu-amdgcn.c.
	(BFD64_BACKENDS): Add elf64-amdgcn.lo.
	(BFD64_BACKENDS_CFILES): Add elf64-amdgcn.c.
	* Makefile.in: Re-generate.
	* cpu-amdgcn.c: New.
	* elf64-amdgcn.c: New.
	* archures.c (bfd_architecture): Add bfd_arch_amdgcn and related
	mach defines.
	(bfd_amdgcn_arch): New.
	(bfd_archures_list): Add bfd_amdgcn_arch.
	* bfd-in2.h: Re-generate.
	* config.bfd: Handle amdgcn* target.
	* configure.ac: Handle amdgcn_elf64_le_vec.
	* configure: Re-generate.
	* elf-bfd.h (elf_target_id): Add AMDGCN_ELF_DATA.
	* targets.c (amdgcn_elf64_le_vec): New.
	(_bfd_target_vector): Add amdgcn_elf64_le_vec.

include/ChangeLog:

	* elf/amdgpu.h: New.
	* elf/common.h (ELFOSABI_AMDGPU_HSA): Add.

Change-Id: I969f7b14960797e88891c308749a6e341eece5b2

12 files changed, 211 insertions, 0 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 4925fff..414646c 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,24 @@
+2022-03-16  Simon Marchi  <simon.marchi@efficios.com>
+
+	* Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES):
+	Add cpu-amdgcn.c.
+	(BFD64_BACKENDS): Add elf64-amdgcn.lo.
+	(BFD64_BACKENDS_CFILES): Add elf64-amdgcn.c.
+	* Makefile.in: Re-generate.
+	* cpu-amdgcn.c: New.
+	* elf64-amdgcn.c: New.
+	* archures.c (bfd_architecture): Add bfd_arch_amdgcn and related
+	mach defines.
+	(bfd_amdgcn_arch): New.
+	(bfd_archures_list): Add bfd_amdgcn_arch.
+	* bfd-in2.h: Re-generate.
+	* config.bfd: Handle amdgcn* target.
+	* configure.ac: Handle amdgcn_elf64_le_vec.
+	* configure: Re-generate.
+	* elf-bfd.h (elf_target_id): Add AMDGCN_ELF_DATA.
+	* targets.c (amdgcn_elf64_le_vec): New.
+	(_bfd_target_vector): Add amdgcn_elf64_le_vec.
+
 2022-03-01  Torbjörn Svensson  <torbjorn.svensson@st.com>
 	    Fred Eisele  <fredrick.eisele@gmail.com>
 
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 0f01384..b9a3f82 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -97,6 +97,7 @@ BFD64_LIBS_CFILES = archive64.c
 ALL_MACHINES = \
 	cpu-aarch64.lo \
 	cpu-alpha.lo \
+	cpu-amdgcn.lo \
 	cpu-arc.lo \
 	cpu-arm.lo \
 	cpu-avr.lo \
@@ -182,6 +183,7 @@ ALL_MACHINES = \
 ALL_MACHINES_CFILES = \
 	cpu-aarch64.c \
 	cpu-alpha.c \
+	cpu-amdgcn.c \
 	cpu-arc.c \
 	cpu-arm.c \
 	cpu-avr.c \
@@ -550,6 +552,7 @@ BFD64_BACKENDS = \
 	elf32-score.lo \
 	elf32-score7.lo \
 	elf64-alpha.lo \
+	elf64-amdgcn.lo \
 	elf64-gen.lo \
 	elf64-hppa.lo \
 	elf64-ia64.lo \
@@ -596,6 +599,7 @@ BFD64_BACKENDS_CFILES = \
 	elf32-score.c \
 	elf32-score7.c \
 	elf64-alpha.c \
+	elf64-amdgcn.c \
 	elf64-gen.c \
 	elf64-hppa.c \
 	elf64-ia64-vms.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index b8e5ea0..934dd4b 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -564,6 +564,7 @@ BFD64_LIBS_CFILES = archive64.c
 ALL_MACHINES = \
 	cpu-aarch64.lo \
 	cpu-alpha.lo \
+	cpu-amdgcn.lo \
 	cpu-arc.lo \
 	cpu-arm.lo \
 	cpu-avr.lo \
@@ -649,6 +650,7 @@ ALL_MACHINES = \
 ALL_MACHINES_CFILES = \
 	cpu-aarch64.c \
 	cpu-alpha.c \
+	cpu-amdgcn.c \
 	cpu-arc.c \
 	cpu-arm.c \
 	cpu-avr.c \
@@ -1019,6 +1021,7 @@ BFD64_BACKENDS = \
 	elf32-score.lo \
 	elf32-score7.lo \
 	elf64-alpha.lo \
+	elf64-amdgcn.lo \
 	elf64-gen.lo \
 	elf64-hppa.lo \
 	elf64-ia64.lo \
@@ -1065,6 +1068,7 @@ BFD64_BACKENDS_CFILES = \
 	elf32-score.c \
 	elf32-score7.c \
 	elf64-alpha.c \
+	elf64-amdgcn.c \
 	elf64-gen.c \
 	elf64-hppa.c \
 	elf64-ia64-vms.c \
@@ -1480,6 +1484,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/corefile.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-aarch64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-alpha.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-amdgcn.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-arc.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-arm.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-avr.Plo@am__quote@
@@ -1646,6 +1651,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-aarch64.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-alpha.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-amdgcn.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-bpf.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-gen.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
diff --git a/bfd/archures.c b/bfd/archures.c
index d19b5d7..fac9fe8 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -559,6 +559,19 @@ DESCRIPTION
 .  bfd_arch_loongarch,       {* LoongArch *}
 .#define bfd_mach_loongarch32	1
 .#define bfd_mach_loongarch64	2
+.  bfd_arch_amdgcn,     {* AMDGCN *}
+.#define bfd_mach_amdgcn_unknown 0x000
+.#define bfd_mach_amdgcn_gfx900  0x02c
+.#define bfd_mach_amdgcn_gfx904  0x02e
+.#define bfd_mach_amdgcn_gfx906  0x02f
+.#define bfd_mach_amdgcn_gfx908  0x030
+.#define bfd_mach_amdgcn_gfx90a  0x03f
+.#define bfd_mach_amdgcn_gfx1010 0x033
+.#define bfd_mach_amdgcn_gfx1011 0x034
+.#define bfd_mach_amdgcn_gfx1012 0x035
+.#define bfd_mach_amdgcn_gfx1030 0x036
+.#define bfd_mach_amdgcn_gfx1031 0x037
+.#define bfd_mach_amdgcn_gfx1032 0x038
 .  bfd_arch_last
 .  };
 */
@@ -614,6 +627,7 @@ DESCRIPTION
 
 extern const bfd_arch_info_type bfd_aarch64_arch;
 extern const bfd_arch_info_type bfd_alpha_arch;
+extern const bfd_arch_info_type bfd_amdgcn_arch;
 extern const bfd_arch_info_type bfd_arc_arch;
 extern const bfd_arch_info_type bfd_arm_arch;
 extern const bfd_arch_info_type bfd_avr_arch;
@@ -704,6 +718,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
 #else
     &bfd_aarch64_arch,
     &bfd_alpha_arch,
+    &bfd_amdgcn_arch,
     &bfd_arc_arch,
     &bfd_arm_arch,
     &bfd_avr_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index db41e7e..c0b563a 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1938,6 +1938,19 @@ enum bfd_architecture
   bfd_arch_loongarch,       /* LoongArch */
 #define bfd_mach_loongarch32   1
 #define bfd_mach_loongarch64   2
+  bfd_arch_amdgcn,     /* AMDGCN */
+#define bfd_mach_amdgcn_unknown 0x000
+#define bfd_mach_amdgcn_gfx900  0x02c
+#define bfd_mach_amdgcn_gfx904  0x02e
+#define bfd_mach_amdgcn_gfx906  0x02f
+#define bfd_mach_amdgcn_gfx908  0x030
+#define bfd_mach_amdgcn_gfx90a  0x03f
+#define bfd_mach_amdgcn_gfx1010 0x033
+#define bfd_mach_amdgcn_gfx1011 0x034
+#define bfd_mach_amdgcn_gfx1012 0x035
+#define bfd_mach_amdgcn_gfx1030 0x036
+#define bfd_mach_amdgcn_gfx1031 0x037
+#define bfd_mach_amdgcn_gfx1032 0x038
   bfd_arch_last
   };
 
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 02f40d4..872685c 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -184,6 +184,7 @@ alpha*)		 targ_archs=bfd_alpha_arch ;;
 am33_2.0*)	 targ_archs=bfd_mn10300_arch ;;
 arc*)		 targ_archs=bfd_arc_arch ;;
 arm*)		 targ_archs=bfd_arm_arch ;;
+amdgcn*)	 targ_archs=bfd_amdgcn_arch ;;
 bfin*)		 targ_archs=bfd_bfin_arch ;;
 c30*)		 targ_archs=bfd_tic30_arch ;;
 c4x*)		 targ_archs=bfd_tic4x_arch ;;
@@ -321,6 +322,10 @@ case "${targ}" in
     targ_defvec=alpha_ecoff_le_vec
     want64=true
     ;;
+  amdgcn-*-*)
+    targ_defvec=amdgcn_elf64_le_vec
+    want64=true
+    ;;
   ia64*-*-freebsd* | ia64*-*-netbsd* | ia64*-*-linux-* | ia64*-*-elf* | ia64*-*-kfreebsd*-gnu)
     targ_defvec=ia64_elf64_le_vec
     targ_selvecs="ia64_elf64_be_vec ia64_pei_vec"
diff --git a/bfd/configure b/bfd/configure
index 4502e52..0ef4c20 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -13364,6 +13364,7 @@ do
     alpha_vms_vec)		 tb="$tb vms-alpha.lo vms-misc.lo vms-lib.lo"; target_size=64 ;;
     alpha_vms_lib_txt_vec)	 tb="$tb vms-lib.lo vms-misc.lo" ;;
     am33_elf32_linux_vec)	 tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
+    amdgcn_elf64_le_vec)	 tb="$tb elf64-amdgcn.lo elf64.lo $elf"; target_size=64 ;;
     aout0_be_vec)		 tb="$tb aout0.lo aout32.lo" ;;
     aout64_vec)			 tb="$tb demo64.lo aout64.lo"; target_size=64 ;;
     aout_vec)			 tb="$tb host-aout.lo aout32.lo" ;;
diff --git a/bfd/configure.ac b/bfd/configure.ac
index 07f2074..9e87373 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -443,6 +443,7 @@ do
     alpha_vms_vec)		 tb="$tb vms-alpha.lo vms-misc.lo vms-lib.lo"; target_size=64 ;;
     alpha_vms_lib_txt_vec)	 tb="$tb vms-lib.lo vms-misc.lo" ;;
     am33_elf32_linux_vec)	 tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
+    amdgcn_elf64_le_vec)	 tb="$tb elf64-amdgcn.lo elf64.lo $elf"; target_size=64 ;;
     aout0_be_vec)		 tb="$tb aout0.lo aout32.lo" ;;
     aout64_vec)			 tb="$tb demo64.lo aout64.lo"; target_size=64 ;;
     aout_vec)			 tb="$tb host-aout.lo aout32.lo" ;;
diff --git a/bfd/cpu-amdgcn.c b/bfd/cpu-amdgcn.c
new file mode 100644
index 0000000..ef51e66
--- /dev/null
+++ b/bfd/cpu-amdgcn.c
@@ -0,0 +1,59 @@
+/* BFD support for the AMDGCN GPU architecture.
+
+   Copyright (C) 2019-2022 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+#define N(MACHINE, PRINTABLE_NAME, DEFAULT, NEXT)       \
+  {                                                     \
+    32, /* 32 bits in a word */                         \
+    64, /* 64 bits in an address */                     \
+    8,  /* 8 bits in a byte */                          \
+    bfd_arch_amdgcn,                                    \
+    MACHINE,                                            \
+    "amdgcn",                                           \
+    PRINTABLE_NAME,                                     \
+    3, /* section align power */                        \
+    DEFAULT,                                            \
+    bfd_default_compatible,                             \
+    bfd_default_scan,                                   \
+    bfd_arch_default_fill,                              \
+    NEXT,                                               \
+    0                                                   \
+  }
+
+#define NN(index) (&arch_info_struct[index])
+
+static const bfd_arch_info_type arch_info_struct[] =
+{
+  N (bfd_mach_amdgcn_gfx904, "amdgcn:gfx904", false, NN (1)),
+  N (bfd_mach_amdgcn_gfx906, "amdgcn:gfx906", false, NN (2)),
+  N (bfd_mach_amdgcn_gfx908, "amdgcn:gfx908", false, NN (3)),
+  N (bfd_mach_amdgcn_gfx90a, "amdgcn:gfx90a", false, NN (4)),
+  N (bfd_mach_amdgcn_gfx1010, "amdgcn:gfx1010", false, NN (5)),
+  N (bfd_mach_amdgcn_gfx1011, "amdgcn:gfx1011", false, NN (6)),
+  N (bfd_mach_amdgcn_gfx1012, "amdgcn:gfx1012", false, NN (7)),
+  N (bfd_mach_amdgcn_gfx1030, "amdgcn:gfx1030", false, NN (8)),
+  N (bfd_mach_amdgcn_gfx1031, "amdgcn:gfx1031", false, NN (9)),
+  N (bfd_mach_amdgcn_gfx1032, "amdgcn:gfx1032", false, NULL)
+};
+
+const bfd_arch_info_type bfd_amdgcn_arch =
+  N (bfd_mach_amdgcn_gfx900, "amdgcn:gfx900", true, NN (0));
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 4904e1e..5c3985f 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -499,6 +499,7 @@ enum elf_target_id
 {
   AARCH64_ELF_DATA = 1,
   ALPHA_ELF_DATA,
+  AMDGCN_ELF_DATA,
   ARC_ELF_DATA,
   ARM_ELF_DATA,
   AVR_ELF_DATA,
diff --git a/bfd/elf64-amdgcn.c b/bfd/elf64-amdgcn.c
new file mode 100644
index 0000000..691fa0a
--- /dev/null
+++ b/bfd/elf64-amdgcn.c
@@ -0,0 +1,80 @@
+/* AMDGCN ELF support for BFD.
+
+   Copyright (C) 2019-2022 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* This file handles ELF files that are of the AMDGCN architecture.  The
+   format is documented here:
+
+     https://llvm.org/docs/AMDGPUUsage.html#elf-code-object */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/amdgpu.h"
+
+#include <string.h>
+
+static bool
+elf64_amdgcn_object_p (bfd *abfd)
+{
+  Elf_Internal_Ehdr *hdr = elf_elfheader (abfd);
+  unsigned int mach;
+  unsigned char osabi;
+  unsigned char osabi_version;
+
+  BFD_ASSERT (hdr->e_machine == EM_AMDGPU);
+
+  osabi = hdr->e_ident[EI_OSABI];
+  osabi_version = hdr->e_ident[EI_ABIVERSION];
+
+  /* Objects with OS ABI HSA version 2 encoded the GPU model differently (in a
+     note), but they are deprecated, so we don't need to support them.  Reject
+     them specifically.
+
+     At the time of writing, all AMDGCN objects encode the specific GPU
+     model in the EF_AMDGPU_MACH field of e_flags.  */
+  if (osabi == ELFOSABI_AMDGPU_HSA
+      && osabi_version < ELFABIVERSION_AMDGPU_HSA_V3)
+    return false;
+
+  mach = elf_elfheader (abfd)->e_flags & EF_AMDGPU_MACH;
+
+  /* Avoid matching non-AMDGCN AMDGPU objects (e.g. r600).  */
+  if (mach < EF_AMDGPU_MACH_AMDGCN_MIN)
+    return false;
+
+  bfd_default_set_arch_mach (abfd, bfd_arch_amdgcn, mach);
+  return true;
+}
+
+
+#define TARGET_LITTLE_SYM	amdgcn_elf64_le_vec
+#define TARGET_LITTLE_NAME	"elf64-amdgcn"
+#define ELF_ARCH		bfd_arch_amdgcn
+#define ELF_TARGET_ID		AMDGCN_ELF_DATA
+#define ELF_MACHINE_CODE	EM_AMDGPU
+#define ELF_MAXPAGESIZE		0x10000 /* 64KB */
+#define ELF_COMMONPAGESIZE	0x1000  /* 4KB */
+
+#define bfd_elf64_bfd_reloc_type_lookup bfd_default_reloc_type_lookup
+#define bfd_elf64_bfd_reloc_name_lookup _bfd_norelocs_bfd_reloc_name_lookup
+
+#define elf_backend_object_p elf64_amdgcn_object_p
+
+#include "elf64-target.h"
diff --git a/bfd/targets.c b/bfd/targets.c
index 18fec45..417743e 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -686,6 +686,7 @@ extern const bfd_target alpha_elf64_fbsd_vec;
 extern const bfd_target alpha_vms_vec;
 extern const bfd_target alpha_vms_lib_txt_vec;
 extern const bfd_target am33_elf32_linux_vec;
+extern const bfd_target amdgcn_elf64_le_vec;
 extern const bfd_target aout_vec;
 extern const bfd_target arc_elf32_be_vec;
 extern const bfd_target arc_elf32_le_vec;
@@ -998,6 +999,10 @@ static const bfd_target * const _bfd_target_vector[] =
 #endif
 
 #ifdef BFD64
+	&amdgcn_elf64_le_vec,
+#endif
+
+#ifdef BFD64
 	&alpha_ecoff_le_vec,
 	&alpha_elf64_vec,
 	&alpha_elf64_fbsd_vec,