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authorMarcus Shawcroft <marcus.shawcroft@arm.com>2014-04-15 17:46:07 +0100
committerMarcus Shawcroft <marcus.shawcroft@arm.com>2014-04-15 17:46:07 +0100
commitfa85fb9a1bf35209a149d07ebefb2a8970e4a27a (patch)
tree4e4455bee3ca3273be5aee30927d9e59ede303ab /bfd
parent35e5d2f0f81d97f9bd41586b1979345072b7989d (diff)
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[AArch64] Fix off by one error in instruction relaxation mask.
The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to ensure that destination register in a relaxed ldr instruction is always X0. The mask has an off by one error resulting in the most significant bit of the destination register being retained in the relaxed instruction. The issue generally appears when the compiler emits TLS accesses code under high register pressure resulting in a broken code sequence.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog4
-rw-r--r--bfd/elfnn-aarch64.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 9331477..55d4828 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,7 @@
+2014-04-15 Marcus Shawcroft <marcus.shawcroft@arm.com>
+
+ * (elfNN_aarch64_tls_relax): Fix instruction mask.
+
2014-04-14 Alan Modra <amodra@gmail.com>
* elf32-ppc.c (BA): Define
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 638938d..a251698 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -3957,7 +3957,7 @@ elfNN_aarch64_tls_relax (struct elf_aarch64_link_hash_table *globals,
ldr xd, [x0, #:tlsdesc_lo12:var] => ldr x0, [x0, #:gottprel_lo12:var]
*/
insn = bfd_getl32 (contents + rel->r_offset);
- insn &= 0xfffffff0;
+ insn &= 0xffffffe0;
bfd_putl32 (insn, contents + rel->r_offset);
return bfd_reloc_continue;
}