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authorH.J. Lu <hjl.tools@gmail.com>2006-02-23 21:36:18 +0000
committerH.J. Lu <hjl.tools@gmail.com>2006-02-23 21:36:18 +0000
commit59cf82fe74db7b9fdf47bcf089a4fd301b067ea5 (patch)
treeec02de0f544d502a6be9bed13ef65fb43f2015f3 /bfd
parent921286914fd31d4b7f3175c55e7c32ceef29a010 (diff)
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bfd/
2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * cpu-ia64-opc.c (ins_immu5b): New. (ext_immu5b): Likewise. (elf64_ia64_operands): Add IMMU5b. gas/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b. gas/testsuite/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/opc-i.s: Add tests for tf. * gas/ia64/pseudo.s: Likewise. * gas/ia64/opc-i.d: Updated. * gas/ia64/pseudo.d: Likewise. include/opcode/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b. opcodes/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64-opc-i.c (bXc): New. (mXc): Likewise. (OpX2TaTbYaXcC): Likewise. (TF). Likewise. (TFCM). Likewise. (ia64_opcodes_i): Add instructions for tf. * ia64-opc.h (IMMU5b): New. * ia64-asmtab.c: Regenerated.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog6
-rw-r--r--bfd/cpu-ia64-opc.c27
2 files changed, 32 insertions, 1 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 4531aad..4130616 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * cpu-ia64-opc.c (ins_immu5b): New.
+ (ext_immu5b): Likewise.
+ (elf64_ia64_operands): Add IMMU5b.
+
2006-02-21 Alan Modra <amodra@bigpond.net.au>
PR ld/2218
diff --git a/bfd/cpu-ia64-opc.c b/bfd/cpu-ia64-opc.c
index 360ee9b..a3adc47 100644
--- a/bfd/cpu-ia64-opc.c
+++ b/bfd/cpu-ia64-opc.c
@@ -1,4 +1,4 @@
-/* Copyright 1998, 1999, 2000, 2001, 2002, 2003
+/* Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
@@ -114,6 +114,29 @@ ext_immu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
}
static const char*
+ins_immu5b (const struct ia64_operand *self, ia64_insn value,
+ ia64_insn *code)
+{
+ if (value < 32 || value > 63)
+ return "value must be between 32 and 63";
+ return ins_immu (self, value - 32, code);
+}
+
+static const char*
+ext_immu5b (const struct ia64_operand *self, ia64_insn code,
+ ia64_insn *valuep)
+{
+ const char *result;
+
+ result = ext_immu (self, code, valuep);
+ if (result)
+ return result;
+
+ *valuep = *valuep + 32;
+ return 0;
+}
+
+static const char*
ins_immus8 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
{
if (value & 0x7)
@@ -506,6 +529,8 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] =
"a 1-bit integer (-1, 0)" },
{ ABS, ins_immu, ext_immu, 0, {{ 2, 13}}, UDEC, /* IMMU2 */
"a 2-bit unsigned (0-3)" },
+ { ABS, ins_immu5b, ext_immu5b, 0, {{ 5, 14}}, UDEC, /* IMMU5b */
+ "a 5-bit unsigned (32 + (0-31))" },
{ ABS, ins_immu, ext_immu, 0, {{ 7, 13}}, 0, /* IMMU7a */
"a 7-bit unsigned (0-127)" },
{ ABS, ins_immu, ext_immu, 0, {{ 7, 20}}, 0, /* IMMU7b */