Add support for the Infineon XC16X.

13 files changed, 729 insertions, 29 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 6162d9c..f2231de 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,21 @@
+2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
+            Anil Paranjape   <anilp1@kpitcummins.com>
+            Shilin Shakti    <shilins@kpitcummins.com>
+
+	* Makefile.am: Add xc16x related entry 
+	* Makefile.in: Regenerate 
+	* archures.c: Add bfd_xc16x_arch 
+	* bfd-in2.h: Regenerate
+	* config.bfd: Add xc16x-*-elf
+	* configure.in: Add bfd_elf32_xc16x_vec
+	* configure: Regenerate.
+	* targets.c: Added xc16x related information
+	* cpu-xc16x.c: New file
+	* reloc.c: Add new relocations specific to xc16x:
+	BFD_RELOC_XC16X_PAG, BFD_RELOC_XC16X_POF, BFD_RELOC_XC16X_SEG,
+	BFD_RELOC_XC16X_SOF	
+	* elf32-xc16x.c: New file.
+
 2006-02-17  Alan Modra  <amodra@bigpond.net.au>
 
 	* elf32-ppc.c (allocate_dynrelocs): Tweak undef weak handling.
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index f44b642..f793c9a 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -111,6 +111,7 @@ ALL_MACHINES = \
 	cpu-w65.lo \
 	cpu-xstormy16.lo \
 	cpu-xtensa.lo \
+	cpu-xc16x.lo \
 	cpu-z80.lo \
 	cpu-z8k.lo
 
@@ -172,6 +173,7 @@ ALL_MACHINES_CFILES = \
 	cpu-w65.c \
 	cpu-xstormy16.c \
 	cpu-xtensa.c \
+	cpu-xc16x.c \
 	cpu-z80.c \
 	cpu-z8k.c
 
@@ -275,6 +277,7 @@ BFD32_BACKENDS = \
 	elf32-vax.lo \
 	elf32-xstormy16.lo \
 	elf32-xtensa.lo \
+	elf32-xc16x.lo \
 	elf32.lo \
 	elflink.lo \
 	elf-strtab.lo \
@@ -446,6 +449,7 @@ BFD32_BACKENDS_CFILES = \
 	elf32-vax.c \
 	elf32-xstormy16.c \
 	elf32-xtensa.c \
+	elf32-xc16x.c \
 	elf32.c \
 	elflink.c \
 	elf-strtab.c \
@@ -1032,6 +1036,7 @@ cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h \
   $(INCDIR)/hashtab.h
 cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-xc16x.lo: cpu-xc16x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-z80.lo: cpu-z80.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
@@ -1433,6 +1438,11 @@ elf32-xtensa.lo: elf32-xtensa.c $(INCDIR)/filenames.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/xtensa.h \
   $(INCDIR)/elf/reloc-macros.h $(INCDIR)/xtensa-isa.h \
   $(INCDIR)/xtensa-config.h elf32-target.h
+elf32-xc16x.lo: elf32-xc16x.c $(INCDIR)/filenames.h \
+  elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+  $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/xc16x.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
+  elf32-target.h
 elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
   $(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index a59783f..bd496aa 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -348,6 +348,7 @@ ALL_MACHINES = \
 	cpu-w65.lo \
 	cpu-xstormy16.lo \
 	cpu-xtensa.lo \
+	cpu-xc16x.lo \
 	cpu-z80.lo \
 	cpu-z8k.lo
 
@@ -409,6 +410,7 @@ ALL_MACHINES_CFILES = \
 	cpu-w65.c \
 	cpu-xstormy16.c \
 	cpu-xtensa.c \
+	cpu-xc16x.c \
 	cpu-z80.c \
 	cpu-z8k.c
 
@@ -513,6 +515,7 @@ BFD32_BACKENDS = \
 	elf32-vax.lo \
 	elf32-xstormy16.lo \
 	elf32-xtensa.lo \
+	elf32-xc16x.lo \
 	elf32.lo \
 	elflink.lo \
 	elf-strtab.lo \
@@ -684,6 +687,7 @@ BFD32_BACKENDS_CFILES = \
 	elf32-vax.c \
 	elf32-xstormy16.c \
 	elf32-xtensa.c \
+	elf32-xc16x.c \
 	elf32.c \
 	elflink.c \
 	elf-strtab.c \
@@ -1599,6 +1603,7 @@ cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h \
   $(INCDIR)/hashtab.h
 cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-xc16x.lo: cpu-xc16x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-z80.lo: cpu-z80.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
@@ -2000,6 +2005,11 @@ elf32-xtensa.lo: elf32-xtensa.c $(INCDIR)/filenames.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/xtensa.h \
   $(INCDIR)/elf/reloc-macros.h $(INCDIR)/xtensa-isa.h \
   $(INCDIR)/xtensa-config.h elf32-target.h
+elf32-xc16x.lo: elf32-xc16x.c $(INCDIR)/filenames.h \
+  elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+  $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/xc16x.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
+  elf32-target.h
 elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
   $(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
diff --git a/bfd/archures.c b/bfd/archures.c
index e9a90e7..fc2f85b 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -358,7 +358,7 @@ DESCRIPTION
 .#define bfd_mach_msp13          13
 .#define bfd_mach_msp14          14
 .#define bfd_mach_msp15          15
-.#define bfd_mach_msp16          16  
+.#define bfd_mach_msp16          16
 .#define bfd_mach_msp21          21
 .#define bfd_mach_msp31          31
 .#define bfd_mach_msp32          32
@@ -367,6 +367,10 @@ DESCRIPTION
 .#define bfd_mach_msp42          42
 .#define bfd_mach_msp43          43
 .#define bfd_mach_msp44          44
+.  bfd_arch_xc16x,     {* Infineon's XC16X Series.               *}
+.#define bfd_mach_xc16x         1
+.#define bfd_mach_xc16xl        2
+.#define bfd_mach_xc16xs         3
 .  bfd_arch_xtensa,    {* Tensilica's Xtensa cores.  *}
 .#define bfd_mach_xtensa	1
 .   bfd_arch_maxq,     {* Dallas MAXQ 10/20 *}
@@ -473,6 +477,7 @@ extern const bfd_arch_info_type bfd_we32k_arch;
 extern const bfd_arch_info_type bfd_w65_arch;
 extern const bfd_arch_info_type bfd_xstormy16_arch;
 extern const bfd_arch_info_type bfd_xtensa_arch;
+extern const bfd_arch_info_type bfd_xc16x_arch;
 extern const bfd_arch_info_type bfd_z80_arch;
 extern const bfd_arch_info_type bfd_z8k_arch;
 
@@ -537,6 +542,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
     &bfd_we32k_arch,
     &bfd_xstormy16_arch,
     &bfd_xtensa_arch,
+    &bfd_xc16x_arch,
     &bfd_z80_arch,
     &bfd_z8k_arch,
 #endif
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 1578cbc..6095ce5 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1952,7 +1952,7 @@ enum bfd_architecture
 #define bfd_mach_msp13          13
 #define bfd_mach_msp14          14
 #define bfd_mach_msp15          15
-#define bfd_mach_msp16          16  
+#define bfd_mach_msp16          16
 #define bfd_mach_msp21          21
 #define bfd_mach_msp31          31
 #define bfd_mach_msp32          32
@@ -1961,6 +1961,10 @@ enum bfd_architecture
 #define bfd_mach_msp42          42
 #define bfd_mach_msp43          43
 #define bfd_mach_msp44          44
+  bfd_arch_xc16x,     /* Infineon's XC16X Series.               */
+#define bfd_mach_xc16x         1
+#define bfd_mach_xc16xl        2
+#define bfd_mach_xc16xs         3
   bfd_arch_xtensa,    /* Tensilica's Xtensa cores.  */
 #define bfd_mach_xtensa        1
    bfd_arch_maxq,     /* Dallas MAXQ 10/20 */
@@ -3976,6 +3980,12 @@ This is the 5 bits of a value.  */
   BFD_RELOC_XSTORMY16_24,
   BFD_RELOC_XSTORMY16_FPTR16,
 
+/* Infineon Relocations.  */
+  BFD_RELOC_XC16X_PAG,
+  BFD_RELOC_XC16X_POF,
+  BFD_RELOC_XC16X_SEG,
+  BFD_RELOC_XC16X_SOF,
+
 /* Relocations used by VAX ELF.  */
   BFD_RELOC_VAX_GLOB_DAT,
   BFD_RELOC_VAX_JMP_SLOT,
@@ -4081,14 +4091,14 @@ replaced by BFD_RELOC_XTENSA_SLOT0_OP.  */
   BFD_RELOC_XTENSA_OP1,
   BFD_RELOC_XTENSA_OP2,
 
-/* Xtensa relocation to mark that the assembler expanded the 
+/* Xtensa relocation to mark that the assembler expanded the
 instructions from an original target.  The expansion size is
 encoded in the reloc size.  */
   BFD_RELOC_XTENSA_ASM_EXPAND,
 
-/* Xtensa relocation to mark that the linker should simplify 
-assembler-expanded instructions.  This is commonly used 
-internally by the linker after analysis of a 
+/* Xtensa relocation to mark that the linker should simplify
+assembler-expanded instructions.  This is commonly used
+internally by the linker after analysis of a
 BFD_RELOC_XTENSA_ASM_EXPAND.  */
   BFD_RELOC_XTENSA_ASM_SIMPLIFY,
 
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 2c8b2a4..37dd03c 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1370,7 +1370,10 @@ case "${targ}" in
     targ_defvec=bfd_elf32_xtensa_le_vec
     targ_selvecs=bfd_elf32_xtensa_be_vec
     ;;
-
+ xc16x-*-elf)
+    targ_defvec=bfd_elf32_xc16x_vec
+    ;;
+  
   z80-*-*)
     targ_defvec=z80coff_vec
     targ_underscore=no
diff --git a/bfd/configure b/bfd/configure
index 5b93fb2..b79f0da 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -3505,6 +3505,7 @@ cygwin* | mingw* |pw32*)
   ;;
 
 darwin* | rhapsody*)
+  # this will be overwritten by pass_all, but leave it in just in case
   lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
   lt_cv_file_magic_cmd='/usr/bin/file -L'
   case "$host_os" in
@@ -3515,6 +3516,7 @@ darwin* | rhapsody*)
     lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
     ;;
   esac
+  lt_cv_deplibs_check_method=pass_all
   ;;
 
 freebsd* | kfreebsd*-gnu)
@@ -3575,14 +3577,7 @@ irix5* | irix6*)
 
 # This must be Linux ELF.
 linux-gnu*)
-  case $host_cpu in
-  alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
-    lt_cv_deplibs_check_method=pass_all ;;
-  *)
-    # glibc up to 2.1.1 does not perform some relocations on ARM
-    lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
-  esac
-  lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+  lt_cv_deplibs_check_method=pass_all
   ;;
 
 netbsd* | knetbsd*-gnu)
@@ -3643,6 +3638,67 @@ deplibs_check_method=$lt_cv_deplibs_check_method
 
 # Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
 
+# find the maximum length of command line arguments
+echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
+echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
+if test "${lt_cv_sys_max_cmd_len+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+    i=0
+  teststring="ABCD"
+
+  case $build_os in
+  msdosdjgpp*)
+    # On DJGPP, this test can blow up pretty badly due to problems in libc
+    # (any single argument exceeding 2000 bytes causes a buffer overrun
+    # during glob expansion).  Even if it were fixed, the result of this
+    # check would be larger than it should be.
+    lt_cv_sys_max_cmd_len=12288;    # 12K is about right
+    ;;
+
+  cygwin* | mingw*)
+    # On Win9x/ME, this test blows up -- it succeeds, but takes
+    # about 5 minutes as the teststring grows exponentially.
+    # Worse, since 9x/ME are not pre-emptively multitasking,
+    # you end up with a "frozen" computer, even though with patience
+    # the test eventually succeeds (with a max line length of 256k).
+    # Instead, let's just punt: use the minimum linelength reported by
+    # all of the supported platforms: 8192 (on NT/2K/XP).
+    lt_cv_sys_max_cmd_len=8192;
+    ;;
+
+  amigaos*)
+    # On AmigaOS with pdksh, this test takes hours, literally.
+    # So we just punt and use a minimum line length of 8192.
+    lt_cv_sys_max_cmd_len=8192;
+    ;;
+
+  netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+    # This has been around since 386BSD, at least.  Likely further.
+    if test -x /sbin/sysctl; then
+      lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+    elif test -x /usr/sbin/sysctl; then
+      lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+    else
+      lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+    fi
+    # And add a safety zone
+    lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+    lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+    ;;
+  esac
+
+fi
+
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+  echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
+echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
+else
+  echo "$as_me:$LINENO: result: none" >&5
+echo "${ECHO_T}none" >&6
+fi
+
+
 # Only perform the check for file, if the check method requires it
 case $deplibs_check_method in
 file_magic*)
@@ -3976,7 +4032,7 @@ test x"$pic_mode" = xno && libtool_flags="$libtool_flags --prefer-non-pic"
 case $host in
 *-*-irix6*)
   # Find out which ABI we are using.
-  echo '#line 3979 "configure"' > conftest.$ac_ext
+  echo '#line 4035 "configure"' > conftest.$ac_ext
   if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
   (eval $ac_compile) 2>&5
   ac_status=$?
@@ -4031,6 +4087,52 @@ ia64-*-hpux*)
   rm -rf conftest*
   ;;
 
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+  # Find out which ABI we are using.
+  echo 'int i;' > conftest.$ac_ext
+  if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+  (eval $ac_compile) 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }; then
+    case "`/usr/bin/file conftest.o`" in
+    *32-bit*)
+      case $host in
+        x86_64-*linux*)
+          LD="${LD-ld} -m elf_i386"
+          ;;
+        ppc64-*linux*|powerpc64-*linux*)
+          LD="${LD-ld} -m elf32ppclinux"
+          ;;
+        s390x-*linux*)
+          LD="${LD-ld} -m elf_s390"
+          ;;
+        sparc64-*linux*)
+          LD="${LD-ld} -m elf32_sparc"
+          ;;
+      esac
+      ;;
+    *64-bit*)
+      case $host in
+        x86_64-*linux*)
+          LD="${LD-ld} -m elf_x86_64"
+          ;;
+        ppc*-*linux*|powerpc*-*linux*)
+          LD="${LD-ld} -m elf64ppc"
+          ;;
+        s390*-*linux*)
+          LD="${LD-ld} -m elf64_s390"
+          ;;
+        sparc*-*linux*)
+          LD="${LD-ld} -m elf64_sparc"
+          ;;
+      esac
+      ;;
+    esac
+  fi
+  rm -rf conftest*
+  ;;
+
 *-*-sco3.2v5*)
   # On SCO OpenServer 5, we need -belf to get full-featured binaries.
   SAVE_CFLAGS="$CFLAGS"
@@ -13059,6 +13161,7 @@ do
     bfd_elf32_v850_vec)		tb="$tb elf32-v850.lo elf32.lo $elf" ;;
     bfd_elf32_vax_vec)		tb="$tb elf32-vax.lo elf32.lo $elf" ;;
     bfd_elf32_xstormy16_vec)	tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
+    bfd_elf32_xc16x_vec)		tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
     bfd_elf32_xtensa_le_vec)	tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
     bfd_elf32_xtensa_be_vec)	tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
     bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
diff --git a/bfd/configure.in b/bfd/configure.in
index 7ebf4b8..b90e1fa 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -674,6 +674,7 @@ do
     bfd_elf32_v850_vec)		tb="$tb elf32-v850.lo elf32.lo $elf" ;;
     bfd_elf32_vax_vec)		tb="$tb elf32-vax.lo elf32.lo $elf" ;;
     bfd_elf32_xstormy16_vec)	tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
+    bfd_elf32_xc16x_vec)		tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
     bfd_elf32_xtensa_le_vec)	tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
     bfd_elf32_xtensa_be_vec)	tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
     bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
diff --git a/bfd/cpu-xc16x.c b/bfd/cpu-xc16x.c
new file mode 100644
index 0000000..1156900
--- /dev/null
+++ b/bfd/cpu-xc16x.c
@@ -0,0 +1,73 @@
+/* BFD support for the Infineon XC16X Microcontroller.
+   Copyright 2006 Free Software Foundation, Inc.
+   Contributed by KPIT Cummins Infosystems 
+
+   This file is part of BFD, the Binary File Descriptor library.
+   Contributed by Anil Paranjpe(anilp1@kpitcummins.com)
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+   02110-1301, USA.  */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type xc16xs_info_struct =
+{
+  16,				/* Bits per word.  */
+  16,				/* Bits per address.  */
+  8,				/* Bits per byte.  */
+  bfd_arch_xc16x,		/* Architecture.  */
+  bfd_mach_xc16xs,		/* Machine.  */
+  "xc16x",			/* Architecture name.  */
+  "xc16xs",			/* Printable name.  */
+  1,				/* Section alignment - 16 bit.  */
+  TRUE,				/* The default ?  */
+  bfd_default_compatible,	/* Architecture comparison fn.  */
+  bfd_default_scan,		/* String to architecture convert fn.  */
+  NULL				/* Next in list.  */
+};
+
+const bfd_arch_info_type xc16xl_info_struct =
+{
+  16,				/* Bits per word.  */
+  32,				/* Bits per address.  */
+  8,				/* Bits per byte.  */
+  bfd_arch_xc16x,		/* Architecture.  */
+  bfd_mach_xc16xl,		/* Machine.  */
+  "xc16x",			/* Architecture name.  */
+  "xc16xl",			/* Printable name.  */
+  1,				/* Section alignment - 16 bit.  */
+  TRUE,				/* The default ?  */
+  bfd_default_compatible,	/* Architecture comparison fn.  */
+  bfd_default_scan,		/* String to architecture convert fn.  */
+  & xc16xs_info_struct		/* Next in list.  */
+};
+
+const bfd_arch_info_type bfd_xc16x_arch =
+{
+  16,				/* Bits per word.  */
+  16,				/* Bits per address.  */
+  8,				/* Bits per byte.  */
+  bfd_arch_xc16x,		/* Architecture.  */
+  bfd_mach_xc16x,		/* Machine.  */
+  "xc16x",			/* Architecture name.  */
+  "xc16x",			/* Printable name.  */
+  1,				/* Section alignment - 16 bit.  */
+  TRUE,				/* The default ?  */
+  bfd_default_compatible,	/* Architecture comparison fn.  */
+  bfd_default_scan,		/* String to architecture convert fn.  */
+  & xc16xl_info_struct		/* Next in list.  */
+};
diff --git a/bfd/elf32-xc16x.c b/bfd/elf32-xc16x.c
new file mode 100644
index 0000000..1824302
--- /dev/null
+++ b/bfd/elf32-xc16x.c
@@ -0,0 +1,449 @@
+/* Infineon XC16X-specific support for 16-bit ELF.
+   Copyright 2006  Free Software Foundation, Inc.
+   Contributed by KPIT Cummins Infosystems 
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/xc16x.h"
+#include "elf/dwarf2.h"
+#include "libiberty.h"
+
+static reloc_howto_type xc16x_elf_howto_table [] =
+{
+  /* This reloc does nothing.  */
+  HOWTO (R_XC16X_NONE,		/* type */
+	 0,			/* rightshift */
+	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_bitfield, /* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_XC16X_NONE",	/* name */
+	 FALSE,			/* partial_inplace */
+	 0,			/* src_mask */
+	 0,			/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* An 8 bit absolute relocation.  */
+  HOWTO (R_XC16X_ABS_8,		/* type */
+	 0,			/* rightshift */
+	 0,			/* size (0 = byte, 1 = short, 2 = long) */
+	 8,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 8,			/* bitpos */
+	 complain_overflow_bitfield, /* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_XC16X_ABS_8",	/* name */
+	 TRUE,			/* partial_inplace */
+	 0x0000,		/* src_mask */
+	 0x00ff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* A 16 bit absolute relocation.  */
+  HOWTO (R_XC16X_ABS_16,	/* type */
+	 0,			/* rightshift */
+	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont, /* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 "R_XC16X_ABS_16",	/* name */
+	 TRUE,			/* partial_inplace */
+	 0x00000000,		/* src_mask */
+	 0x0000ffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  HOWTO (R_XC16X_ABS_32,	/* type */
+  	 0,			/* rightshift */
+  	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+  	 32,			/* bitsize */
+  	 FALSE,			/* pc_relative */
+  	 0,			/* bitpos */
+  	 complain_overflow_bitfield, /* complain_on_overflow */
+  	 bfd_elf_generic_reloc,	/* special_function */
+  	 "R_XC16X_ABS_32",	/* name */
+  	 TRUE,			/* partial_inplace */
+  	 0x00000000,		/* src_mask */
+  	 0xffffffff,		/* dst_mask */
+  	 FALSE),		/* pcrel_offset */
+
+
+  /* A PC relative 8 bit relocation.  */
+  HOWTO (R_XC16X_8_PCREL,	/* type */
+	 0,			/* rightshift */
+	 0,			/* size (0 = byte, 1 = short, 2 = long) */
+	 8,			/* bitsize */
+	 TRUE,			/* pc_relative */
+	 8,			/* bitpos */
+	 complain_overflow_signed, /* complain_on_overflow */
+	 bfd_elf_generic_reloc, /* special_function */
+	 "R_XC16X_8_PCREL",	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x0000,		/* src_mask */
+	 0x00ff,		/* dst_mask */
+	 TRUE),		/* pcrel_offset */
+
+  /* Relocation regarding page number.  */
+    HOWTO (R_XC16X_PAG,	/* type */
+  	 0,			/* rightshift */
+  	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+  	 16,			/* bitsize */
+  	 FALSE,			/* pc_relative */
+  	 0,			/* bitpos */
+  	 complain_overflow_signed, /* complain_on_overflow */
+  	 bfd_elf_generic_reloc, /* special_function */
+  	 "R_XC16X_PAG",	/* name */
+  	 TRUE,			/* partial_inplace */
+  	 0x00000000,		/* src_mask */
+  	 0x0000ffff,		/* dst_mask */
+  	 FALSE),		/* pcrel_offset */
+
+
+  /* Relocation regarding page number.  */
+      HOWTO (R_XC16X_POF,	/* type */
+    	 0,			/* rightshift */
+    	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+    	 16,			/* bitsize */
+    	 FALSE,			/* pc_relative */
+    	 0,			/* bitpos  */
+    	 complain_overflow_signed, /* complain_on_overflow  */
+    	 bfd_elf_generic_reloc, /* special_function  */
+    	 "R_XC16X_POF",	/* name  */
+    	 TRUE,			/* partial_inplace  */
+    	 0x00000000,		/* src_mask  */
+    	 0x0000ffff,		/* dst_mask  */
+    	 FALSE),		/* pcrel_offset  */
+
+
+  /* Relocation regarding segment number.   */
+      HOWTO (R_XC16X_SEG,	/* type  */
+    	 0,			/* rightshift  */
+    	 1,			/* size (0 = byte, 1 = short, 2 = long)  */
+    	 16,			/* bitsize  */
+    	 FALSE,			/* pc_relative  */
+    	 0,			/* bitpos  */
+    	 complain_overflow_signed, /* complain_on_overflow  */
+    	 bfd_elf_generic_reloc, /* special_function  */
+    	 "R_XC16X_SEG",	/* name  */
+    	 TRUE,			/* partial_inplace  */
+    	 0x00000000,		/* src_mask  */
+    	 0x0000ffff,		/* dst_mask  */
+    	 FALSE),		/* pcrel_offset  */
+
+  /* Relocation regarding segment offset.  */
+      HOWTO (R_XC16X_SOF,	/* type  */
+    	 0,			/* rightshift  */
+    	 1,			/* size (0 = byte, 1 = short, 2 = long)  */
+    	 16,			/* bitsize  */
+    	 FALSE,			/* pc_relative  */
+    	 0,			/* bitpos  */
+    	 complain_overflow_signed, /* complain_on_overflow  */
+    	 bfd_elf_generic_reloc, /* special_function  */
+    	 "R_XC16X_SOF",	/* name */
+    	 TRUE,			/* partial_inplace  */
+    	 0x00000000,		/* src_mask  */
+    	 0x0000ffff,		/* dst_mask  */
+    	 FALSE)			/* pcrel_offset  */
+};
+
+
+/* Map BFD reloc types to XC16X ELF reloc types.  */
+
+struct xc16x_reloc_map
+{
+  bfd_reloc_code_real_type bfd_reloc_val;
+  unsigned int xc16x_reloc_val;
+};
+
+static const struct xc16x_reloc_map xc16x_reloc_map [] =
+{
+  { BFD_RELOC_NONE,           R_XC16X_NONE },
+  { BFD_RELOC_8,              R_XC16X_ABS_8 },
+  { BFD_RELOC_16,             R_XC16X_ABS_16 },
+  { BFD_RELOC_32,             R_XC16X_ABS_32 },
+  { BFD_RELOC_8_PCREL,        R_XC16X_8_PCREL },
+  { BFD_RELOC_XC16X_PAG,      R_XC16X_PAG},
+  { BFD_RELOC_XC16X_POF,      R_XC16X_POF},
+  { BFD_RELOC_XC16X_SEG,      R_XC16X_SEG},
+  { BFD_RELOC_XC16X_SOF,      R_XC16X_SOF},
+};
+
+
+/* This function is used to search for correct relocation type from
+   howto structure.  */
+
+static reloc_howto_type *
+xc16x_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+			 bfd_reloc_code_real_type code)
+{
+  unsigned int i;
+
+  for (i = ARRAY_SIZE (xc16x_reloc_map); --i;)
+    if (xc16x_reloc_map [i].bfd_reloc_val == code)
+      return & xc16x_elf_howto_table [xc16x_reloc_map[i].xc16x_reloc_val];
+
+  return NULL;
+}
+
+/* For a particular operand this function is
+   called to finalise the type of relocation.  */
+
+static void
+elf32_xc16x_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
+			   Elf_Internal_Rela *elf_reloc)
+{
+  unsigned int r;
+  unsigned int i;
+
+  r = ELF32_R_TYPE (elf_reloc->r_info);
+  for (i = 0; i < ARRAY_SIZE (xc16x_elf_howto_table); i++)
+    if (xc16x_elf_howto_table[i].type == r)
+      {
+	bfd_reloc->howto = &xc16x_elf_howto_table[i];
+	return;
+      }
+  abort ();
+}
+
+static bfd_reloc_status_type
+elf32_xc16x_final_link_relocate (unsigned long r_type,
+				 bfd *input_bfd,
+				 bfd *output_bfd ATTRIBUTE_UNUSED,
+				 asection *input_section ATTRIBUTE_UNUSED,
+				 bfd_byte *contents,
+				 bfd_vma offset,
+				 bfd_vma value,
+				 bfd_vma addend,
+				 struct bfd_link_info *info ATTRIBUTE_UNUSED,
+				 asection *sym_sec ATTRIBUTE_UNUSED,
+				 int is_local ATTRIBUTE_UNUSED)
+{
+  bfd_byte *hit_data = contents + offset;
+  bfd_vma val1;
+
+  switch (r_type)
+    {
+    case R_XC16X_NONE:
+      return bfd_reloc_ok;
+
+    case R_XC16X_ABS_16:
+      value += addend;
+      bfd_put_16 (input_bfd, value, hit_data);
+      return bfd_reloc_ok;
+
+    case R_XC16X_8_PCREL:
+      bfd_put_8 (input_bfd, value, hit_data);
+      return bfd_reloc_ok;
+
+      /* Following case is to find page number from actual
+	 address for this divide value by 16k i.e. page size.  */
+
+    case R_XC16X_PAG:
+      value += addend;
+      value /= 0x4000;
+      bfd_put_16 (input_bfd, value, hit_data);
+      return bfd_reloc_ok;
+
+      /* Following case is to find page offset from actual address
+	 for this take modulo of value by 16k i.e. page size.  */
+
+    case R_XC16X_POF:
+      value += addend;
+      value %= 0x4000;
+      bfd_put_16 (input_bfd, value, hit_data);
+      return bfd_reloc_ok;
+
+      /* Following case is to find segment number from actual
+	 address for this divide value by 64k i.e. segment size.  */
+
+    case R_XC16X_SEG:
+      value += addend;
+      value /= 0x10000;
+      bfd_put_16 (input_bfd, value, hit_data);
+      return bfd_reloc_ok;
+
+      /* Following case is to find segment offset from actual address
+	 for this take modulo of value by 64k i.e. segment size.  */
+
+    case R_XC16X_SOF:
+      value += addend;
+      value %= 0x10000;
+      bfd_put_16 (input_bfd, value, hit_data);
+      return bfd_reloc_ok;
+
+    case R_XC16X_ABS_32:
+      if (!strstr (input_section->name,".debug"))
+	{
+	  value += addend;
+	  val1 = value;
+	  value %= 0x4000;
+	  val1 /= 0x4000;
+	  val1 = val1 << 16;
+	  value += val1;
+	  bfd_put_32 (input_bfd, value, hit_data);
+	}
+      else
+	{
+	  value += addend;
+	  bfd_put_32 (input_bfd, value, hit_data);
+	}
+      return bfd_reloc_ok;
+
+    default:
+      return bfd_reloc_notsupported;
+    }
+}
+
+static bfd_boolean
+elf32_xc16x_relocate_section (bfd *output_bfd,
+			      struct bfd_link_info *info,
+			      bfd *input_bfd,
+			      asection *input_section,
+			      bfd_byte *contents,
+			      Elf_Internal_Rela *relocs,
+			      Elf_Internal_Sym *local_syms,
+			      asection **local_sections)
+{
+  Elf_Internal_Shdr *symtab_hdr;
+  struct elf_link_hash_entry **sym_hashes;
+  Elf_Internal_Rela *rel, *relend;
+
+  if (info->relocatable)
+    return TRUE;
+
+  symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+  sym_hashes = elf_sym_hashes (input_bfd);
+
+  rel = relocs;
+  relend = relocs + input_section->reloc_count;
+  for (; rel < relend; rel++)
+    {
+      unsigned int r_type;
+      unsigned long r_symndx;
+      Elf_Internal_Sym *sym;
+      asection *sec;
+      struct elf_link_hash_entry *h;
+      bfd_vma relocation;
+      bfd_reloc_status_type r;
+
+      /* This is a final link.  */
+      r_symndx = ELF32_R_SYM (rel->r_info);
+      r_type = ELF32_R_TYPE (rel->r_info);
+      h = NULL;
+      sym = NULL;
+      sec = NULL;
+      if (r_symndx < symtab_hdr->sh_info)
+	{
+	  sym = local_syms + r_symndx;
+	  sec = local_sections[r_symndx];
+	  relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+	}
+      else
+	{
+	  bfd_boolean unresolved_reloc, warned;
+
+	  RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
+				   r_symndx, symtab_hdr, sym_hashes,
+				   h, sec, relocation,
+				   unresolved_reloc, warned);
+	}
+
+      r = elf32_xc16x_final_link_relocate (r_type, input_bfd, output_bfd,
+					input_section,
+					contents, rel->r_offset,
+					relocation, rel->r_addend,
+					info, sec, h == NULL);
+    }
+
+  return TRUE;
+}
+
+
+static void
+elf32_xc16x_final_write_processing (bfd *abfd,
+				    bfd_boolean linker ATTRIBUTE_UNUSED)
+{
+  unsigned long val;
+
+  switch (bfd_get_mach (abfd))
+    {
+    default:
+    case bfd_mach_xc16x:
+      val = 0x1000;
+      break;
+
+    case bfd_mach_xc16xl:
+      val = 0x1001;
+      break;
+
+    case bfd_mach_xc16xs:
+      val = 0x1002;
+      break;
+    }
+
+  elf_elfheader (abfd)->e_flags |= val;
+}
+
+static unsigned long
+elf32_xc16x_mach (flagword flags)
+{  
+  switch (flags)
+    {
+    case 0x1000:
+    default: 
+      return bfd_mach_xc16x;
+
+    case 0x1001:
+      return bfd_mach_xc16xl;
+
+    case 0x1002:
+      return bfd_mach_xc16xs;
+    }
+}
+
+
+static bfd_boolean
+elf32_xc16x_object_p (bfd *abfd)
+{
+  bfd_default_set_arch_mach (abfd, bfd_arch_xc16x,
+			     elf32_xc16x_mach (elf_elfheader (abfd)->e_flags));
+  return TRUE;
+}
+
+
+#define ELF_ARCH		bfd_arch_xc16x
+#define ELF_MACHINE_CODE	EM_XC16X
+#define ELF_MAXPAGESIZE		0x100
+
+#define TARGET_LITTLE_SYM       bfd_elf32_xc16x_vec
+#define TARGET_LITTLE_NAME	"elf32-xc16x"
+#define elf_backend_final_write_processing	elf32_xc16x_final_write_processing
+#define elf_backend_object_p   		elf32_xc16x_object_p
+#define elf_backend_can_gc_sections	1
+#define bfd_elf32_bfd_reloc_type_lookup	xc16x_reloc_type_lookup
+#define elf_info_to_howto		elf32_xc16x_info_to_howto
+#define elf_info_to_howto_rel		elf32_xc16x_info_to_howto
+#define elf_backend_relocate_section  	elf32_xc16x_relocate_section
+#define elf_backend_rela_normal		1
+
+#include "elf32-target.h"
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 2150cee..bcc35b1 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -1762,6 +1762,10 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_XSTORMY16_12",
   "BFD_RELOC_XSTORMY16_24",
   "BFD_RELOC_XSTORMY16_FPTR16",
+  "BFD_RELOC_XC16X_PAG",
+  "BFD_RELOC_XC16X_POF",
+  "BFD_RELOC_XC16X_SEG",
+  "BFD_RELOC_XC16X_SOF",
   "BFD_RELOC_VAX_GLOB_DAT",
   "BFD_RELOC_VAX_JMP_SLOT",
   "BFD_RELOC_VAX_RELATIVE",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 98246c8..5a66c38 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2622,11 +2622,11 @@ ENUMDOC
   Thumb 22 bit pc-relative branch.  The lowest bit must be zero and is
   not stored in the instruction.  The 2nd lowest bit comes from a 1 bit
   field in the instruction.
-ENUM 
+ENUM
   BFD_RELOC_ARM_PCREL_CALL
 ENUMDOC
   ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
-ENUM 
+ENUM
   BFD_RELOC_ARM_PCREL_JUMP
 ENUMDOC
   ARM 26-bit pc-relative branch for B or conditional BL instruction.
@@ -4221,7 +4221,7 @@ ENUMX
   BFD_RELOC_CRX_SWITCH16
 ENUMX
   BFD_RELOC_CRX_SWITCH32
-ENUMDOC 
+ENUMDOC
   NS CRX Relocations.
 
 ENUM
@@ -4385,6 +4385,17 @@ ENUMDOC
   Sony Xstormy16 Relocations.
 
 ENUM
+  BFD_RELOC_XC16X_PAG
+ENUMX
+  BFD_RELOC_XC16X_POF
+ENUMX
+  BFD_RELOC_XC16X_SEG
+ENUMX
+  BFD_RELOC_XC16X_SOF
+ENUMDOC
+  Infineon Relocations.
+
+ENUM
   BFD_RELOC_VAX_GLOB_DAT
 ENUMX
   BFD_RELOC_VAX_JMP_SLOT
@@ -4392,19 +4403,19 @@ ENUMX
   BFD_RELOC_VAX_RELATIVE
 ENUMDOC
   Relocations used by VAX ELF.
-  
+
 ENUM
   BFD_RELOC_MT_PC16
 ENUMDOC
-  Morpho MT - 16 bit immediate relocation. 
+  Morpho MT - 16 bit immediate relocation.
 ENUM
   BFD_RELOC_MT_HI16
 ENUMDOC
-  Morpho MT - Hi 16 bits of an address. 
+  Morpho MT - Hi 16 bits of an address.
 ENUM
   BFD_RELOC_MT_LO16
 ENUMDOC
-  Morpho MT - Low 16 bits of an address. 
+  Morpho MT - Low 16 bits of an address.
 ENUM
   BFD_RELOC_MT_GNU_VTINHERIT
 ENUMDOC
@@ -4416,7 +4427,7 @@ ENUMDOC
 ENUM
   BFD_RELOC_MT_PCINSN8
 ENUMDOC
-  Morpho MT - 8 bit immediate relocation. 
+  Morpho MT - 8 bit immediate relocation.
 
 ENUM
   BFD_RELOC_MSP430_10_PCREL
@@ -4556,15 +4567,15 @@ ENUMDOC
 ENUM
   BFD_RELOC_XTENSA_ASM_EXPAND
 ENUMDOC
-  Xtensa relocation to mark that the assembler expanded the 
+  Xtensa relocation to mark that the assembler expanded the
   instructions from an original target.  The expansion size is
   encoded in the reloc size.
 ENUM
   BFD_RELOC_XTENSA_ASM_SIMPLIFY
 ENUMDOC
-  Xtensa relocation to mark that the linker should simplify 
-  assembler-expanded instructions.  This is commonly used 
-  internally by the linker after analysis of a 
+  Xtensa relocation to mark that the linker should simplify
+  assembler-expanded instructions.  This is commonly used
+  internally by the linker after analysis of a
   BFD_RELOC_XTENSA_ASM_EXPAND.
 
 ENUM
diff --git a/bfd/targets.c b/bfd/targets.c
index 6f75bca..99f3006 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -636,6 +636,7 @@ extern const bfd_target bfd_elf32_tradlittlemips_vec;
 extern const bfd_target bfd_elf32_us_cris_vec;
 extern const bfd_target bfd_elf32_v850_vec;
 extern const bfd_target bfd_elf32_vax_vec;
+extern const bfd_target bfd_elf32_xc16x_vec;
 extern const bfd_target bfd_elf32_xstormy16_vec;
 extern const bfd_target bfd_elf32_xtensa_be_vec;
 extern const bfd_target bfd_elf32_xtensa_le_vec;
@@ -946,6 +947,7 @@ static const bfd_target * const _bfd_target_vector[] = {
 	&bfd_elf32_us_cris_vec,
 	&bfd_elf32_v850_vec,
 	&bfd_elf32_vax_vec,
+	&bfd_elf32_xc16x_vec,
 	&bfd_elf32_xstormy16_vec,
 	&bfd_elf32_xtensa_be_vec,
 	&bfd_elf32_xtensa_le_vec,
@@ -975,7 +977,7 @@ static const bfd_target * const _bfd_target_vector[] = {
 	&bfd_elf64_tradbigmips_vec,
 	&bfd_elf64_tradlittlemips_vec,
 	&bfd_elf64_x86_64_vec,
-	&bfd_mmo_vec, 
+	&bfd_mmo_vec,
 #endif
 	&bfd_powerpc_pe_vec,
 	&bfd_powerpc_pei_vec,