Add support for a .secrel32 x86 reloc to allow DWARF" debug information to used

with COFF based x86 ports.

5 files changed, 63 insertions, 0 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index dda65cd..bff4274 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,12 @@
+2004-04-20  DJ Delorie  <dj@redhat.com>
+
+	* reloc.c: Add BFD_RELOC_32_SECREL.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Likewise.
+	* coff-i386.c (howto_table) [COFF_WITH_PE]: Add R_SECREL32.
+	(coff_i386_rtype_to_howto) [COFF_WITH_PE]: Handle it.
+	(coff_i386_reloc_type_lookup) [COFF_WITH_PE]: Likewise.
+
 2004-04-19  Jakub Jelinek  <jakub@redhat.com>
 
 	* elf32-sparc.c (elf32_sparc_relocate_section): Handle
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index c2e1819..07af231 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2027,6 +2027,9 @@ The 24-bit relocation is used in some Intel 960 configurations.  */
   BFD_RELOC_12_PCREL,
   BFD_RELOC_8_PCREL,
 
+/* Section relative relocations.  Some targets need this for DWARF2.  */
+  BFD_RELOC_32_SECREL,
+
 /* For ELF.  */
   BFD_RELOC_32_GOT_PCREL,
   BFD_RELOC_16_GOT_PCREL,
diff --git a/bfd/coff-i386.c b/bfd/coff-i386.c
index a24344a..e2bf860 100644
--- a/bfd/coff-i386.c
+++ b/bfd/coff-i386.c
@@ -234,7 +234,24 @@ static reloc_howto_type howto_table[] =
   EMPTY_HOWTO (010),
   EMPTY_HOWTO (011),
   EMPTY_HOWTO (012),
+#ifdef COFF_WITH_PE
+  /* 32-bit longword section relative relocation (013).  */
+  HOWTO (R_SECREL32,		/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 32,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_bitfield, /* complain_on_overflow */
+	 coff_i386_reloc,	/* special_function */
+	 "secrel32",		/* name */
+	 TRUE,			/* partial_inplace */
+	 0xffffffff,		/* src_mask */
+	 0xffffffff,		/* dst_mask */
+	 TRUE),			/* pcrel_offset */
+#else
   EMPTY_HOWTO (013),
+#endif
   EMPTY_HOWTO (014),
   EMPTY_HOWTO (015),
   EMPTY_HOWTO (016),
@@ -497,6 +514,30 @@ coff_i386_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
     {
       *addendp -= pe_data(sec->output_section->owner)->pe_opthdr.ImageBase;
     }
+
+  if (rel->r_type == R_SECREL32)
+    {
+      bfd_vma osect_vma;
+
+      if (h && (h->type == bfd_link_hash_defined
+		|| h->type == bfd_link_hash_defweak))
+	osect_vma = h->root.u.def.section->output_section->vma;
+      else
+	{
+	  asection *sec;
+	  int i;
+
+	  /* Sigh, the only way to get the section to offset against
+	     is to find it the hard way.  */
+
+	  for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
+	    sec = sec->next;
+
+	  osect_vma = sec->output_section->vma;
+	}
+
+      *addendp -= osect_vma;
+    }
 #endif
 
   return howto;
@@ -525,6 +566,10 @@ coff_i386_reloc_type_lookup (abfd, code)
       return howto_table + R_RELBYTE;
     case BFD_RELOC_8_PCREL:
       return howto_table + R_PCRBYTE;
+#ifdef COFF_WITH_PE
+    case BFD_RELOC_32_SECREL:
+      return howto_table + R_SECREL32;
+#endif
     default:
       BFD_FAIL ();
       return 0;
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index e4e17f9..6afe58d 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -699,6 +699,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_16_PCREL",
   "BFD_RELOC_12_PCREL",
   "BFD_RELOC_8_PCREL",
+  "BFD_RELOC_32_SECREL",
   "BFD_RELOC_32_GOT_PCREL",
   "BFD_RELOC_16_GOT_PCREL",
   "BFD_RELOC_8_GOT_PCREL",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index cc4f6a7..59fe848 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -1647,6 +1647,11 @@ the section containing the relocation.  It depends on the specific target.
 The 24-bit relocation is used in some Intel 960 configurations.
 
 ENUM
+  BFD_RELOC_32_SECREL
+ENUMDOC
+  Section relative relocations.  Some targets need this for DWARF2.
+
+ENUM
   BFD_RELOC_32_GOT_PCREL
 ENUMX
   BFD_RELOC_16_GOT_PCREL