diff options
author | Nick Clifton <nickc@redhat.com> | 2003-02-10 10:44:48 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2003-02-10 10:44:48 +0000 |
commit | fde78edd7af5c957f88e3a8c4266c663a8bd2df0 (patch) | |
tree | 0329194b5ea2bdf30c6cc7169cc7a6ff635b09e1 /bfd | |
parent | 469def5365549e40f76e9ed6f46fa8fba6a53c52 (diff) | |
download | gdb-fde78edd7af5c957f88e3a8c4266c663a8bd2df0.zip gdb-fde78edd7af5c957f88e3a8c4266c663a8bd2df0.tar.gz gdb-fde78edd7af5c957f88e3a8c4266c663a8bd2df0.tar.bz2 |
Add support for marking ARM ELF binaries as support the Cirrus EP9312 Maverick
floating point co-processor.
Diffstat (limited to 'bfd')
-rw-r--r-- | bfd/ChangeLog | 11 | ||||
-rw-r--r-- | bfd/archures.c | 1 | ||||
-rw-r--r-- | bfd/bfd-in2.h | 1 | ||||
-rw-r--r-- | bfd/cpu-arm.c | 6 | ||||
-rw-r--r-- | bfd/elf32-arm.h | 25 |
5 files changed, 39 insertions, 5 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 908c55e..2e1138e 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,14 @@ +2003-02-10 Nick Clifton <nickc@redhat.com> + + * archures.c (bfd_mach_arm_ep9312): Define. + * bfd-in2.h: Regenerate. + * cpu-arm.c (processors[]): Add ep9312. + (bfd_arm_arch): Add ep9312. + * elf32-arm.h (elf32_arm_merge_private_data): Update error + messages and add test for Maverick floating point support. + (elf32_arm_print_private_bfd_data): Handle + EF_ARM_MAVERICK_FLOAT flag. + 2003-02-10 Alan Modra <amodra@bigpond.net.au> * elf64-ppc.c: Rename assorted occurrences of tls_type and similar diff --git a/bfd/archures.c b/bfd/archures.c index 08015f9..62edda1 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -234,6 +234,7 @@ DESCRIPTION .#define bfd_mach_arm_5T 8 .#define bfd_mach_arm_5TE 9 .#define bfd_mach_arm_XScale 10 +.#define bfd_mach_arm_ep9312 11 . bfd_arch_ns32k, {* National Semiconductors ns32000 *} . bfd_arch_w65, {* WDC 65816 *} . bfd_arch_tic30, {* Texas Instruments TMS320C30 *} diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 1820b23..c9b973d 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1689,6 +1689,7 @@ enum bfd_architecture #define bfd_mach_arm_5T 8 #define bfd_mach_arm_5TE 9 #define bfd_mach_arm_XScale 10 +#define bfd_mach_arm_ep9312 11 bfd_arch_ns32k, /* National Semiconductors ns32000 */ bfd_arch_w65, /* WDC 65816 */ bfd_arch_tic30, /* Texas Instruments TMS320C30 */ diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c index cd4bf14..923c250 100644 --- a/bfd/cpu-arm.c +++ b/bfd/cpu-arm.c @@ -95,7 +95,8 @@ processors[] = { bfd_mach_arm_4, "strongarm"}, { bfd_mach_arm_4, "strongarm110" }, { bfd_mach_arm_4, "strongarm1100" }, - { bfd_mach_arm_XScale, "xscale" } + { bfd_mach_arm_XScale, "xscale" }, + { bfd_mach_arm_ep9312, "ep9312" } }; static bfd_boolean @@ -140,7 +141,8 @@ static const bfd_arch_info_type arch_info_struct[] = N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]), N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]), N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]), - N (bfd_mach_arm_XScale, "xscale", FALSE, NULL) + N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]), + N (bfd_mach_arm_ep9312, "ep9312", FALSE, NULL) }; const bfd_arch_info_type bfd_arm_arch = diff --git a/bfd/elf32-arm.h b/bfd/elf32-arm.h index 48eb873..3c56eb8 100644 --- a/bfd/elf32-arm.h +++ b/bfd/elf32-arm.h @@ -2310,12 +2310,28 @@ ERROR: %s passes floats in integer registers, whereas %s passes them in float re { if (in_flags & EF_ARM_VFP_FLOAT) _bfd_error_handler (_("\ -ERROR: %s uses VFP instructions, whereas %s uses FPA instructions"), +ERROR: %s uses VFP instructions, whereas %s does not"), bfd_archive_filename (ibfd), bfd_get_filename (obfd)); else _bfd_error_handler (_("\ -ERROR: %s uses FPA instructions, whereas %s uses VFP instructions"), +ERROR: %s uses FPA instructions, whereas %s does not"), + bfd_archive_filename (ibfd), + bfd_get_filename (obfd)); + + flags_compatible = FALSE; + } + + if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) + { + if (in_flags & EF_ARM_MAVERICK_FLOAT) + _bfd_error_handler (_("\ +ERROR: %s uses Maverick instructions, whereas %s does not"), + bfd_archive_filename (ibfd), + bfd_get_filename (obfd)); + else + _bfd_error_handler (_("\ +ERROR: %s uses Maverick instructions, whereas %s does not"), bfd_archive_filename (ibfd), bfd_get_filename (obfd)); @@ -2410,6 +2426,8 @@ elf32_arm_print_private_bfd_data (abfd, ptr) if (flags & EF_ARM_VFP_FLOAT) fprintf (file, _(" [VFP float format]")); + else if (flags & EF_ARM_MAVERICK_FLOAT) + fprintf (file, _(" [Maverick float format]")); else fprintf (file, _(" [FPA float format]")); @@ -2430,7 +2448,8 @@ elf32_arm_print_private_bfd_data (abfd, ptr) flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI - | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT); + | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT + | EF_ARM_MAVERICK_FLOAT); break; case EF_ARM_EABI_VER1: |