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| author | Jiong Wang <jiong.wang@arm.com> | 2015-06-01 10:31:38 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2015-06-01 10:31:38 +0100 |
| commit | 36e6c1400b94b9da7ba0dff5b3900a8d3e3b0c75 (patch) | |
| tree | 3d1ec0ddf403d51adf334e946862bf15befff7c7 /bfd | |
| parent | 99ad26cb0d4f9152dbe5ed03b74020cc52d84d94 (diff) | |
| download | gdb-36e6c1400b94b9da7ba0dff5b3900a8d3e3b0c75.zip gdb-36e6c1400b94b9da7ba0dff5b3900a8d3e3b0c75.tar.gz gdb-36e6c1400b94b9da7ba0dff5b3900a8d3e3b0c75.tar.bz2 | |
[AArch64] BFD_RELOC_AARCH64_TLSLE_ADD_LO12 should enable overflow check
BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest
one-instruction addressing for TLS LE model when tls size is smaller
4K. Linker need to make sure there is no TLS offset overflow.
2015-06-01 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to
complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use
PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all
potential high overflowed bits.
ld/testsuite/
* ld-aarch64/tprel_add_lo12_overflow.s: New testcase.
* ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file.
* ld-aarch64/aarch64-elf.exp: Run new testcase.
Diffstat (limited to 'bfd')
| -rw-r--r-- | bfd/ChangeLog | 7 | ||||
| -rw-r--r-- | bfd/elfnn-aarch64.c | 2 | ||||
| -rw-r--r-- | bfd/elfxx-aarch64.c | 5 |
3 files changed, 12 insertions, 2 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 5ae71b2..678f0cc 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,12 @@ 2015-06-01 Jiong Wang <jiong.wang@arm.com> + * elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to + complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12. + * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use + PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12. + +2015-06-01 Jiong Wang <jiong.wang@arm.com> + * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c index bcb25fd..26f20c5 100644 --- a/bfd/elfnn-aarch64.c +++ b/bfd/elfnn-aarch64.c @@ -1083,7 +1083,7 @@ static reloc_howto_type elfNN_aarch64_howto_table[] = 12, /* bitsize */ FALSE, /* pc_relative */ 0, /* bitpos */ - complain_overflow_dont, /* complain_on_overflow */ + complain_overflow_unsigned, /* complain_on_overflow */ bfd_elf_generic_reloc, /* special_function */ AARCH64_R_STR (TLSLE_ADD_TPREL_LO12), /* name */ FALSE, /* partial_inplace */ diff --git a/bfd/elfxx-aarch64.c b/bfd/elfxx-aarch64.c index 889b0d0..ec0744b 100644 --- a/bfd/elfxx-aarch64.c +++ b/bfd/elfxx-aarch64.c @@ -435,11 +435,14 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type, case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: - case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC: value = PG_OFFSET (value + addend); break; + case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12: + value = value + addend; + break; + case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1: case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC: value = (value + addend) & (bfd_vma) 0xffff0000; |