diff options
author | Nick Clifton <nickc@redhat.com> | 1999-07-05 07:28:24 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 1999-07-05 07:28:24 +0000 |
commit | 478d07d67c1ed4232955b83ce7812c66bac30d81 (patch) | |
tree | c681fb7ad8485241437cc5a7c53ae2107b216379 /bfd | |
parent | 752149a0588c2410eec80160f65c2191967fd575 (diff) | |
download | gdb-478d07d67c1ed4232955b83ce7812c66bac30d81.zip gdb-478d07d67c1ed4232955b83ce7812c66bac30d81.tar.gz gdb-478d07d67c1ed4232955b83ce7812c66bac30d81.tar.bz2 |
Add support for arm v5 architectures.
Diffstat (limited to 'bfd')
-rw-r--r-- | bfd/ChangeLog | 9 | ||||
-rw-r--r-- | bfd/archures.c | 6 | ||||
-rw-r--r-- | bfd/bfd-in2.h | 6 | ||||
-rw-r--r-- | bfd/coffcode.h | 3 | ||||
-rw-r--r-- | bfd/cpu-arm.c | 15 |
5 files changed, 32 insertions, 7 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index ccf94ad..96ce6ae 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,14 @@ 1999-07-05 Nick Clifton <nickc@cygnus.com> + * coffcode.h (coff_set_arch_mach_hook): Recognise arm 5 + architectures. + (coff_set_flags): Recognise arm 5 architectures. + + * cpu-arm.c: Add support for strongarm and arm9 cpus. + Add support for armv5 architecture. + + * archures.c: Add bfd_mach_arm_5 and bfd_mach_arm_5T. + * reloc.c: Add new, assembler only, ARM reloc: BFD_RELOC_ARM_ADRL_IMMEDIATE. diff --git a/bfd/archures.c b/bfd/archures.c index f243862..7f2c5f7 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -162,11 +162,13 @@ DESCRIPTION .#define bfd_mach_alpha_ev6 0x30 . bfd_arch_arm, {* Advanced Risc Machines ARM *} .#define bfd_mach_arm_2 1 -.#define bfd_mach_arm_2a 2 +.#define bfd_mach_arm_2a 2 .#define bfd_mach_arm_3 3 .#define bfd_mach_arm_3M 4 -.#define bfd_mach_arm_4 5 +.#define bfd_mach_arm_4 5 .#define bfd_mach_arm_4T 6 +.#define bfd_mach_arm_5 7 +.#define bfd_mach_arm_5T 8 . bfd_arch_ns32k, {* National Semiconductors ns32000 *} . bfd_arch_w65, {* WDC 65816 *} . bfd_arch_tic30, {* Texas Instruments TMS320C30 *} diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 1009c4d..78cadab 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1316,11 +1316,13 @@ enum bfd_architecture #define bfd_mach_alpha_ev6 0x30 bfd_arch_arm, /* Advanced Risc Machines ARM */ #define bfd_mach_arm_2 1 -#define bfd_mach_arm_2a 2 +#define bfd_mach_arm_2a 2 #define bfd_mach_arm_3 3 #define bfd_mach_arm_3M 4 -#define bfd_mach_arm_4 5 +#define bfd_mach_arm_4 5 #define bfd_mach_arm_4T 6 +#define bfd_mach_arm_5 7 +#define bfd_mach_arm_5T 8 bfd_arch_ns32k, /* National Semiconductors ns32000 */ bfd_arch_w65, /* WDC 65816 */ bfd_arch_tic30, /* Texas Instruments TMS320C30 */ diff --git a/bfd/coffcode.h b/bfd/coffcode.h index e9e7b30..f48425e 100644 --- a/bfd/coffcode.h +++ b/bfd/coffcode.h @@ -1429,6 +1429,7 @@ coff_set_arch_mach_hook (abfd, filehdr) case F_ARM_3M: machine = bfd_mach_arm_3M; break; case F_ARM_4: machine = bfd_mach_arm_4; break; case F_ARM_4T: machine = bfd_mach_arm_4T; break; + case F_ARM_5: machine = bfd_mach_arm_5; break; } break; #endif @@ -2067,6 +2068,8 @@ coff_set_flags (abfd, magicp, flagsp) case bfd_mach_arm_3M: * flagsp |= F_ARM_3M; break; case bfd_mach_arm_4: * flagsp |= F_ARM_4; break; case bfd_mach_arm_4T: * flagsp |= F_ARM_4T; break; + case bfd_mach_arm_5: * flagsp |= F_ARM_5; break; + case bfd_mach_arm_5T: * flagsp |= F_ARM_5; break; /* XXX - we do not have an F_ARM_5T */ } return true; #endif diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c index d999c0f..bda9c44 100644 --- a/bfd/cpu-arm.c +++ b/bfd/cpu-arm.c @@ -1,5 +1,5 @@ /* BFD support for the ARM processor - Copyright 1994, 95, 1997 Free Software Foundation, Inc. + Copyright 1994, 95, 97, 1999 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) This file is part of BFD, the Binary File Descriptor library. @@ -82,10 +82,17 @@ processors[] = { bfd_mach_arm_3, "arm7di" }, { bfd_mach_arm_3M, "arm7dm" }, { bfd_mach_arm_3M, "arm7dmi" }, + { bfd_mach_arm_4T, "arm7tdmi" }, { bfd_mach_arm_4, "arm8" }, { bfd_mach_arm_4, "arm810" }, + { bfd_mach_arm_4, "arm9" }, + { bfd_mach_arm_4, "arm920" }, + { bfd_mach_arm_4T, "arm920t" }, + { bfd_mach_arm_4T, "arm9tdmi" }, { bfd_mach_arm_4, "sa1" }, - { bfd_mach_arm_4T, "arm7tdmi" } + { bfd_mach_arm_4, "strongarm"}, + { bfd_mach_arm_4, "strongarm110" }, + { bfd_mach_arm_4, "strongarm1100" }, }; static boolean @@ -127,7 +134,9 @@ static const bfd_arch_info_type arch_info_struct[] = N( bfd_mach_arm_3, "armv3", false, & arch_info_struct[3] ), N( bfd_mach_arm_3M, "armv3m", false, & arch_info_struct[4] ), N( bfd_mach_arm_4, "armv4", false, & arch_info_struct[5] ), - N( bfd_mach_arm_4T, "armv4t", false, NULL ) + N( bfd_mach_arm_4T, "armv4t", false, & arch_info_struct[6] ), + N( bfd_mach_arm_5, "armv5", false, & arch_info_struct[7] ), + N( bfd_mach_arm_5T, "armv5t", false, NULL ) }; const bfd_arch_info_type bfd_arm_arch = |