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authorH.J. Lu <hjl.tools@gmail.com>2008-12-23 14:36:40 +0000
committerH.J. Lu <hjl.tools@gmail.com>2008-12-23 14:36:40 +0000
commitfeddcd0d460b9d7810013e54c39132b25bcd512b (patch)
treebc03d9ff0a4610e0d1e16523dd049ae0edd28c60 /bfd
parent0332c262c9b9a3518256696b2dbee57650401e0d (diff)
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2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/7036 * elfxx-ia64.c (elfNN_ia64_relax_section): Assume linker will always insert 32byte between the .plt and .text sections after the the first relaxation pass.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog7
-rw-r--r--bfd/elfxx-ia64.c14
2 files changed, 20 insertions, 1 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 13d495d..8e71db7 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/7036
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Assume linker will
+ always insert 32byte between the .plt and .text sections after
+ the the first relaxation pass.
+
2008-12-23 Nick Clifton <nickc@redhat.com>
PR 7093
diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c
index d662c74..801c25b 100644
--- a/bfd/elfxx-ia64.c
+++ b/bfd/elfxx-ia64.c
@@ -994,8 +994,20 @@ elfNN_ia64_relax_section (bfd *abfd, asection *sec,
+ sec->output_offset
+ roff) & (bfd_vma) -4;
+ /* The .plt section is aligned at 32byte and the .text section
+ is aligned at 64byte. The .text section is right after the
+ .plt section. After the first relaxation pass, linker may
+ increase the gap between the .plt and .text sections up
+ to 32byte. We assume linker will always insert 32byte
+ between the .plt and .text sections after the the first
+ relaxation pass. */
+ if (tsec == ia64_info->plt_sec)
+ offset = -0x1000000 + 32;
+ else
+ offset = -0x1000000;
+
/* If the branch is in range, no need to do anything. */
- if ((bfd_signed_vma) (symaddr - reladdr) >= -0x1000000
+ if ((bfd_signed_vma) (symaddr - reladdr) >= offset
&& (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0)
{
/* If the 60-bit branch is in 21-bit range, optimize it. */