include/opcode/

	* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.
bfd/
	* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
	bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
	* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
	(ppc_handle_align): Add termination nop opcode for e500mc family.
	* doc/as.texinfo: Document options -me5500 and -me6500.
	* doc/c-ppc.texi: Likewise.
gas/testsuite/
	* gas/ppc/e500mc64_nop.s: New test case for e500mc family
	termination nops.
	* gas/ppc/e500mc64_nop.d: Likewise.
	* gas/ppc/e5500_nop.s: Likewise.
	* gas/ppc/e5500_nop.d: Likewise.
	* gas/ppc/e6500_nop.s: Likewise.
	* gas/ppc/e6500_nop.d: Likewise.
	* gas/ppc/e6500.s: New.
	* gas/ppc/e6500.d: Likewise.
	* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.

4 files changed, 45 insertions, 4 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 66a7339..a65e854 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
+
+	* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
+	* bfd-in2.h: Regenerate.
+	* cpu-powerpc.c (bfd_powerpc_archs): Add entries for
+	bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
+
 2012-03-09  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR ld/13817
diff --git a/bfd/archures.c b/bfd/archures.c
index 92c4867..d38d806 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -1,7 +1,7 @@
 /* BFD library support routines for architectures.
    Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
-   Free Software Foundation, Inc.
+   2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
+   2012 Free Software Foundation, Inc.
    Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
 
    This file is part of BFD, the Binary File Descriptor library.
@@ -241,6 +241,8 @@ DESCRIPTION
 .#define bfd_mach_ppc_e500      500
 .#define bfd_mach_ppc_e500mc    5001
 .#define bfd_mach_ppc_e500mc64  5005
+.#define bfd_mach_ppc_e5500     5006
+.#define bfd_mach_ppc_e6500     5007
 .#define bfd_mach_ppc_titan     83
 .  bfd_arch_rs6000,    {* IBM RS/6000 *}
 .#define bfd_mach_rs6k		6000
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index bb43860..bea3a05 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1947,6 +1947,8 @@ enum bfd_architecture
 #define bfd_mach_ppc_e500      500
 #define bfd_mach_ppc_e500mc    5001
 #define bfd_mach_ppc_e500mc64  5005
+#define bfd_mach_ppc_e5500     5006
+#define bfd_mach_ppc_e6500     5007
 #define bfd_mach_ppc_titan     83
   bfd_arch_rs6000,    /* IBM RS/6000 */
 #define bfd_mach_rs6k          6000
diff --git a/bfd/cpu-powerpc.c b/bfd/cpu-powerpc.c
index 6a652b2..19604c3 100644
--- a/bfd/cpu-powerpc.c
+++ b/bfd/cpu-powerpc.c
@@ -1,6 +1,6 @@
 /* BFD PowerPC CPU definition
-   Copyright 1994, 1995, 1996, 2000, 2001, 2002, 2003, 2005, 2007, 2008, 2010
-   Free Software Foundation, Inc.
+   Copyright 1994, 1995, 1996, 2000, 2001, 2002, 2003, 2005, 2007, 2008,
+   2010, 2012 Free Software Foundation, Inc.
    Contributed by Ian Lance Taylor, Cygnus Support.
 
    This file is part of BFD, the Binary File Descriptor library.
@@ -373,6 +373,36 @@ const bfd_arch_info_type bfd_powerpc_archs[] =
     powerpc_compatible,
     bfd_default_scan,
     bfd_arch_default_fill,
+    &bfd_powerpc_archs[19]
+  },
+  {
+    64, /* 64 bits in a word */
+    64, /* 64 bits in an address */
+    8,  /* 8 bits in a byte */
+    bfd_arch_powerpc,
+    bfd_mach_ppc_e5500,
+    "powerpc",
+    "powerpc:e5500",
+    3,
+    FALSE, /* not the default */
+    powerpc_compatible,
+    bfd_default_scan,
+    bfd_arch_default_fill,
+    &bfd_powerpc_archs[20]
+  },
+  {
+    64, /* 64 bits in a word */
+    64, /* 64 bits in an address */
+    8,  /* 8 bits in a byte */
+    bfd_arch_powerpc,
+    bfd_mach_ppc_e6500,
+    "powerpc",
+    "powerpc:e6500",
+    3,
+    FALSE, /* not the default */
+    powerpc_compatible,
+    bfd_default_scan,
+    bfd_arch_default_fill,
     0
   }
 };