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authorChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:36:23 +0800
committerChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:43:19 +0800
commitbd782c07b914f28fd927cec42eacd8adcf556dca (patch)
tree5fe589fdb8177e2471661eca4f913e6a9616630c /bfd
parentac8cb70f3690b4eace1325c7ff918dce9073da7c (diff)
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[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
bfd/ * archures.c (bfd_architecture): New machine bfd_mach_mips_gs464e. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (enum I_xxx): Likewise. (arch_info_struct): Likewise. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_GS464E. (mips_set_isa_flags): Likewise. (mips_mach_extensions): Map bfd_mach_mips_gs464e to bfd_mach_mips_gs464 extension. binutils/ * NEWS: Mention Loongson 3A2000/3A3000 proccessor support. * readelf.c (get_machine_flags): Handle gs464e. elfcpp/ * mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E. gas/ * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E. (mips_cpu_info_table): Add gs464e descriptors. * doc/as.texi (march table): Add gs464e. include/ * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E. * opcode/mips.h (CPU_XXX): New CPU_GS464E. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination gs464e and gs464. opcodes/ * mips-dis.c (mips_arch_choices): Add gs464e descriptors.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog13
-rw-r--r--bfd/archures.c1
-rw-r--r--bfd/bfd-in2.h1
-rw-r--r--bfd/cpu-mips.c2
-rw-r--r--bfd/elfxx-mips.c8
5 files changed, 25 insertions, 0 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 16ebfdd..70957e1 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,18 @@
2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+ * archures.c (bfd_architecture): New machine
+ bfd_mach_mips_gs464e.
+ * bfd-in2.h (bfd_architecture): Likewise.
+ * cpu-mips.c (enum I_xxx): Likewise.
+ (arch_info_struct): Likewise.
+ * elfxx-mips.c (_bfd_elf_mips_mach): Handle
+ E_MIPS_MACH_GS464E.
+ (mips_set_isa_flags): Likewise.
+ (mips_mach_extensions): Map bfd_mach_mips_gs464e to
+ bfd_mach_mips_gs464 extension.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
* archures.c (bfd_architecture): Rename
bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
* bfd-in2.h (bfd_architecture): Likewise.
diff --git a/bfd/archures.c b/bfd/archures.c
index f247eaa..2fd9bda 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -176,6 +176,7 @@ DESCRIPTION
.#define bfd_mach_mips_loongson_2e 3001
.#define bfd_mach_mips_loongson_2f 3002
.#define bfd_mach_mips_gs464 3003
+.#define bfd_mach_mips_gs464e 3004
.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01. *}
.#define bfd_mach_mips_octeon 6501
.#define bfd_mach_mips_octeonp 6601
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index dc8e514..6819416 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2070,6 +2070,7 @@ enum bfd_architecture
#define bfd_mach_mips_loongson_2e 3001
#define bfd_mach_mips_loongson_2f 3002
#define bfd_mach_mips_gs464 3003
+#define bfd_mach_mips_gs464e 3004
#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01. */
#define bfd_mach_mips_octeon 6501
#define bfd_mach_mips_octeonp 6601
diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c
index f578d95..2617c79 100644
--- a/bfd/cpu-mips.c
+++ b/bfd/cpu-mips.c
@@ -99,6 +99,7 @@ enum
I_loongson_2e,
I_loongson_2f,
I_gs464,
+ I_gs464e,
I_mipsocteon,
I_mipsocteonp,
I_mipsocteon2,
@@ -151,6 +152,7 @@ static const bfd_arch_info_type arch_info_struct[] =
N (64, 64, bfd_mach_mips_loongson_2e, "mips:loongson_2e", FALSE, NN(I_loongson_2e)),
N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, NN(I_loongson_2f)),
N (64, 64, bfd_mach_mips_gs464, "mips:gs464", FALSE, NN(I_gs464)),
+ N (64, 64, bfd_mach_mips_gs464e, "mips:gs464e", FALSE, NN(I_gs464e)),
N (64, 64, bfd_mach_mips_octeon,"mips:octeon", FALSE, NN(I_mipsocteon)),
N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index f880fa3..25c2d9c 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -6790,6 +6790,9 @@ _bfd_elf_mips_mach (flagword flags)
case E_MIPS_MACH_GS464:
return bfd_mach_mips_gs464;
+ case E_MIPS_MACH_GS464E:
+ return bfd_mach_mips_gs464e;
+
case E_MIPS_MACH_OCTEON3:
return bfd_mach_mips_octeon3;
@@ -11988,6 +11991,10 @@ mips_set_isa_flags (bfd *abfd)
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS464;
break;
+ case bfd_mach_mips_gs464e:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS464E;
+ break;
+
case bfd_mach_mips_octeon:
case bfd_mach_mips_octeonp:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON;
@@ -13993,6 +14000,7 @@ static const struct mips_mach_extension mips_mach_extensions[] =
{ bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
{ bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
{ bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
+ { bfd_mach_mips_gs464e, bfd_mach_mips_gs464 },
{ bfd_mach_mips_gs464, bfd_mach_mipsisa64r2 },
/* MIPS64 extensions. */