diff options
| author | Tristan Gingold <gingold@adacore.com> | 2010-08-04 10:22:14 +0000 |
|---|---|---|
| committer | Tristan Gingold <gingold@adacore.com> | 2010-08-04 10:22:14 +0000 |
| commit | 5f101a3d6f22d0d98898df1f8cf8c406c5d96777 (patch) | |
| tree | 6f02ed17d88d7f3156a518e2f45749f58cb86ad3 /bfd/vms-alpha.c | |
| parent | 6e5710cea9c8a6dc04e7b3deb606b7234715e926 (diff) | |
| download | gdb-5f101a3d6f22d0d98898df1f8cf8c406c5d96777.zip gdb-5f101a3d6f22d0d98898df1f8cf8c406c5d96777.tar.gz gdb-5f101a3d6f22d0d98898df1f8cf8c406c5d96777.tar.bz2 | |
2010-08-04 Tristan Gingold <gingold@adacore.com>
* vms-alpha.c (alpha_vms_create_eisd_for_section): Make writable
sections with relocs.
(alpha_vms_add_fixup_lp): Set SEC_RELOC flag.
(alpha_vms_add_fixup_ca): Ditto.
(alpha_vms_add_fixup_qr): Ditto.
Add comments.
Diffstat (limited to 'bfd/vms-alpha.c')
| -rw-r--r-- | bfd/vms-alpha.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/bfd/vms-alpha.c b/bfd/vms-alpha.c index 1f6e97f..e500cd4 100644 --- a/bfd/vms-alpha.c +++ b/bfd/vms-alpha.c @@ -2904,6 +2904,10 @@ alpha_vms_create_eisd_for_section (bfd *abfd, asection *sec) else if (!(sec->flags & SEC_READONLY)) eisd->u.eisd.flags |= EISD__M_WRT | EISD__M_CRF; + /* If relocations or fixup will be applied, make this isect writeable. */ + if (sec->flags & SEC_RELOC) + eisd->u.eisd.flags |= EISD__M_WRT | EISD__M_CRF; + if (!(sec->flags & SEC_LOAD)) { eisd->u.eisd.flags |= EISD__M_DZRO; @@ -8017,8 +8021,11 @@ alpha_vms_add_fixup_lp (struct bfd_link_info *info, bfd *src, bfd *shlib) sl->has_fixups = TRUE; VEC_APPEND_EL (sl->lp, bfd_vma, sect->output_section->vma + sect->output_offset + offset); + sect->output_section->flags |= SEC_RELOC; } +/* Add a code address fixup at address SECT + OFFSET to SHLIB. */ + static void alpha_vms_add_fixup_ca (struct bfd_link_info *info, bfd *src, bfd *shlib) { @@ -8031,8 +8038,11 @@ alpha_vms_add_fixup_ca (struct bfd_link_info *info, bfd *src, bfd *shlib) sl->has_fixups = TRUE; VEC_APPEND_EL (sl->ca, bfd_vma, sect->output_section->vma + sect->output_offset + offset); + sect->output_section->flags |= SEC_RELOC; } +/* Add a quad word relocation fixup at address SECT + OFFSET to SHLIB. */ + static void alpha_vms_add_fixup_qr (struct bfd_link_info *info, bfd *src, bfd *shlib, bfd_vma vec) @@ -8048,6 +8058,7 @@ alpha_vms_add_fixup_qr (struct bfd_link_info *info, bfd *src, r = VEC_APPEND (sl->qr, struct alpha_vms_vma_ref); r->vma = sect->output_section->vma + sect->output_offset + offset; r->ref = vec; + sect->output_section->flags |= SEC_RELOC; } static void @@ -8055,6 +8066,7 @@ alpha_vms_add_fixup_lr (struct bfd_link_info *info ATTRIBUTE_UNUSED, unsigned int shr ATTRIBUTE_UNUSED, bfd_vma vec ATTRIBUTE_UNUSED) { + /* Not yet supported. */ abort (); } |