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authorRainer Orth <ro@TechFak.Uni-Bielefeld.DE>2010-10-22 12:08:32 +0000
committerRainer Orth <ro@TechFak.Uni-Bielefeld.DE>2010-10-22 12:08:32 +0000
commit1360ba7676d14e2c69958ac09f9ac23d58f38d54 (patch)
tree28844a529fef68868b56c161e75b0c3066ed8451 /bfd/targets.c
parent87c119b0c366f4a7388d4f52a95761a9a016f659 (diff)
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* emulparams/elf32_sparc_sol2.sh (OUTPUT_FORMAT): Set to elf32-sparc-sol2. * emulparams/elf64_sparc_sol2.sh (OUTPUT_FORMAT): Set to elf64-sparc-sol2. gas: * config/tc-sparc.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define as elf32-sparc-sol2. (ELF64_TARGET_FORMAT): Define as elf64-sparc-sol2. bfd: * elfxx-sparc.c (tpoff): Define bed, static_tls_size. Consider static_tls_alignment. * elf32-sparc.c (TARGET_BIG_SYM): Redefine to bfd_elf32_sparc_sol2_vec. (TARGET_BIG_NAME): Redefine to elf32-sparc-sol2. (elf32_bed): Redefine to elf32_sparc_sol2_bed. (elf_backend_static_tls_alignment): Redefine to 8. Include elf32-target.h. (elf_backend_static_tls_alignment): Undef again for VxWorks. * elf64-sparc.c (TARGET_BIG_SYM): Redefine to bfd_elf64_sparc_sol2_vec. (TARGET_BIG_NAME): Redefine to elf64-sparc-sol2. (ELF_OSABI): Undef. (elf64_bed): Redefine to elf64_sparc_sol2_bed. (elf_backend_static_tls_alignment): Redefine to 16. Include elf64-target.h. * config.bfd (sparc-*-solaris2.[0-6]): Split from sparc-*-elf*. Set targ_defvec to bfd_elf32_sparc_sol2_vec. [BFD64] (sparc-*-solaris2*): Set targ_defvec to bfd_elf32_sparc_sol2_vec. Replace bfd_elf64_sparc_vec by bfd_elf64_sparc_sol2_vec in targ_selvecs. * configure.in: Handle bfd_elf32_sparc_sol2_vec, bfd_elf64_sparc_sol2_vec. * configure: Regenerate. * targets.c (bfd_elf32_sparc_sol2_vec): Declare. (bfd_elf64_sparc_sol2_vec): Declare. (_bfd_target_vector): Add bfd_elf32_sparc_sol2_vec, bfd_elf64_sparc_sol2_vec.
Diffstat (limited to 'bfd/targets.c')
-rw-r--r--bfd/targets.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/bfd/targets.c b/bfd/targets.c
index aaf7e99..3e99754 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -676,6 +676,7 @@ extern const bfd_target bfd_elf32_shlvxworks_vec;
extern const bfd_target bfd_elf32_shnbsd_vec;
extern const bfd_target bfd_elf32_shvxworks_vec;
extern const bfd_target bfd_elf32_sparc_vec;
+extern const bfd_target bfd_elf32_sparc_sol2_vec;
extern const bfd_target bfd_elf32_sparc_vxworks_vec;
extern const bfd_target bfd_elf32_spu_vec;
extern const bfd_target bfd_elf32_tic6x_be_vec;
@@ -713,6 +714,7 @@ extern const bfd_target bfd_elf64_sh64lnbsd_vec;
extern const bfd_target bfd_elf64_sh64nbsd_vec;
extern const bfd_target bfd_elf64_sparc_vec;
extern const bfd_target bfd_elf64_sparc_freebsd_vec;
+extern const bfd_target bfd_elf64_sparc_sol2_vec;
extern const bfd_target bfd_elf64_tradbigmips_vec;
extern const bfd_target bfd_elf64_tradlittlemips_vec;
extern const bfd_target bfd_elf64_x86_64_freebsd_vec;
@@ -1025,6 +1027,7 @@ static const bfd_target * const _bfd_target_vector[] =
&bfd_elf32_sh64blin_vec,
#endif
&bfd_elf32_sparc_vec,
+ &bfd_elf32_sparc_sol2_vec,
&bfd_elf32_sparc_vxworks_vec,
&bfd_elf32_spu_vec,
&bfd_elf32_tic6x_be_vec,
@@ -1063,6 +1066,7 @@ static const bfd_target * const _bfd_target_vector[] =
&bfd_elf64_sh64blin_vec,
&bfd_elf64_sparc_vec,
&bfd_elf64_sparc_freebsd_vec,
+ &bfd_elf64_sparc_sol2_vec,
&bfd_elf64_tradbigmips_vec,
&bfd_elf64_tradlittlemips_vec,
&bfd_elf64_x86_64_freebsd_vec,