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author | Nick Clifton <nickc@redhat.com> | 2015-10-07 14:20:19 +0100 |
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committer | Nick Clifton <nickc@redhat.com> | 2015-10-07 14:20:19 +0100 |
commit | 886a250647ac0c608f20a7007fc2167a70f64e20 (patch) | |
tree | 4a2ccd0c452f7802a11e2549c74b713621f36c0e /bfd/reloc.c | |
parent | 3b0357dadaf2366cc418ec725dec55b1cea1a2e7 (diff) | |
download | gdb-886a250647ac0c608f20a7007fc2167a70f64e20.zip gdb-886a250647ac0c608f20a7007fc2167a70f64e20.tar.gz gdb-886a250647ac0c608f20a7007fc2167a70f64e20.tar.bz2 |
New ARC implementation.
bfd * archures.c: Remove support for older ARC. Added support for new
ARC cpus (ARC600, ARC601, ARC700, ARCV2).
* bfd-in2.h: Likewise.
* config.bfd: Likewise.
* cpu-arc.c: Likewise.
* elf32-arc.c: Totally changed file with a refactored
inplementation of the ARC port.
* libbfd.h: Added ARC specific relocation types.
* reloc.c: Likewise.
gas * config/tc-arc.c: Revamped file for ARC support.
* config/tc-arc.h: Likewise.
* doc/as.texinfo: Add new ARC options.
* doc/c-arc.texi: Likewise.
ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
* emulparams/arcebelf_prof.sh: New file
* emulparams/arcebelf.sh: Likewise.
* emulparams/arceblinux_prof.sh: Likewise.
* emulparams/arceblinux.sh: Likewise.
* emulparams/arcelf_prof.sh: Likewise.
* emulparams/arcelf.sh: Likewise.
* emulparams/arclinux_prof.sh: Likewise.
* emulparams/arclinux.sh: Likewise.
* emulparams/arcv2elfx.sh: Likewise.
* emulparams/arcv2elf.sh: Likewise.
* emultempl/arclinux.em: Likewise.
* scripttempl/arclinux.sc: Likewise.
* scripttempl/elfarc.sc: Likewise.
* scripttempl/elfarcv2.sc: Likewise
* Makefile.am: Add new ARC emulations.
* Makefile.in: Regenerate.
* NEWS: Mention the new feature.
opcodes * arc-dis.c: Revamped file for ARC support
* arc-dis.h: Likewise.
* arc-ext.c: Likewise.
* arc-ext.h: Likewise.
* arc-opc.c: Likewise.
* arc-fxi.h: New file.
* arc-regs.h: Likewise.
* arc-tbl.h: Likewise.
binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
and ARCv2.
(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
(guess_is_rela): Likewise.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Likewise.
* NEWS: Mention the new feature.
include * dis-asm.h (arc_get_disassembler): Correct declaration.
* arc-reloc.def: Macro file with definition of all relocation
types.
* arc.h: Changed macros for the newly supported ARC cpus. Altered
enum defining the supported relocations.
* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
macro for EM_ARC_COMPACT2.
* arc-func.h: New file.
* arc.h: Likewise.
Diffstat (limited to 'bfd/reloc.c')
-rw-r--r-- | bfd/reloc.c | 141 |
1 files changed, 130 insertions, 11 deletions
diff --git a/bfd/reloc.c b/bfd/reloc.c index 18ca7bb..886c63e 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -3515,18 +3515,137 @@ ENUMDOC Renesas / SuperH SH relocs. Not all of these appear in object files. ENUM - BFD_RELOC_ARC_B22_PCREL -ENUMDOC - ARC Cores relocs. - ARC 22 bit pc-relative branch. The lowest two bits must be zero and are - not stored in the instruction. The high 20 bits are installed in bits 26 - through 7 of the instruction. -ENUM - BFD_RELOC_ARC_B26 + BFD_RELOC_ARC_NONE +ENUMX + BFD_RELOC_ARC_8 +ENUMX + BFD_RELOC_ARC_16 +ENUMX + BFD_RELOC_ARC_24 +ENUMX + BFD_RELOC_ARC_32 +ENUMX + BFD_RELOC_ARC_N8 +ENUMX + BFD_RELOC_ARC_N16 +ENUMX + BFD_RELOC_ARC_N24 +ENUMX + BFD_RELOC_ARC_N32 +ENUMX + BFD_RELOC_ARC_SDA +ENUMX + BFD_RELOC_ARC_SECTOFF +ENUMX + BFD_RELOC_ARC_S21H_PCREL +ENUMX + BFD_RELOC_ARC_S21W_PCREL +ENUMX + BFD_RELOC_ARC_S25H_PCREL +ENUMX + BFD_RELOC_ARC_S25W_PCREL +ENUMX + BFD_RELOC_ARC_SDA32 +ENUMX + BFD_RELOC_ARC_SDA_LDST +ENUMX + BFD_RELOC_ARC_SDA_LDST1 +ENUMX + BFD_RELOC_ARC_SDA_LDST2 +ENUMX + BFD_RELOC_ARC_SDA16_LD +ENUMX + BFD_RELOC_ARC_SDA16_LD1 +ENUMX + BFD_RELOC_ARC_SDA16_LD2 +ENUMX + BFD_RELOC_ARC_S13_PCREL +ENUMX + BFD_RELOC_ARC_W +ENUMX + BFD_RELOC_ARC_32_ME +ENUMX + BFD_RELOC_ARC_32_ME_S +ENUMX + BFD_RELOC_ARC_N32_ME +ENUMX + BFD_RELOC_ARC_SECTOFF_ME +ENUMX + BFD_RELOC_ARC_SDA32_ME +ENUMX + BFD_RELOC_ARC_W_ME +ENUMX + BFD_RELOC_AC_SECTOFF_U8 +ENUMX + BFD_RELOC_AC_SECTOFF_U8_1 +ENUMX + BFD_RELOC_AC_SECTOFF_U8_2 +ENUMX + BFD_RELOC_AC_SECTFOFF_S9 +ENUMX + BFD_RELOC_AC_SECTFOFF_S9_1 +ENUMX + BFD_RELOC_AC_SECTFOFF_S9_2 +ENUMX + BFD_RELOC_ARC_SECTOFF_ME_1 +ENUMX + BFD_RELOC_ARC_SECTOFF_ME_2 +ENUMX + BFD_RELOC_ARC_SECTOFF_1 +ENUMX + BFD_RELOC_ARC_SECTOFF_2 +ENUMX + BFD_RELOC_ARC_SDA16_ST2 +ENUMX + BFD_RELOC_ARC_PC32 +ENUMX + BFD_RELOC_ARC_GOT32 +ENUMX + BFD_RELOC_ARC_GOTPC32 +ENUMX + BFD_RELOC_ARC_PLT32 +ENUMX + BFD_RELOC_ARC_COPY +ENUMX + BFD_RELOC_ARC_GLOB_DAT +ENUMX + BFD_RELOC_ARC_JMP_SLOT +ENUMX + BFD_RELOC_ARC_RELATIVE +ENUMX + BFD_RELOC_ARC_GOTOFF +ENUMX + BFD_RELOC_ARC_GOTPC +ENUMX + BFD_RELOC_ARC_S21W_PCREL_PLT +ENUMX + BFD_RELOC_ARC_S25H_PCREL_PLT +ENUMX + BFD_RELOC_ARC_TLS_DTPMOD +ENUMX + BFD_RELOC_ARC_TLS_TPOFF +ENUMX + BFD_RELOC_ARC_TLS_GD_GOT +ENUMX + BFD_RELOC_ARC_TLS_GD_LD +ENUMX + BFD_RELOC_ARC_TLS_GD_CALL +ENUMX + BFD_RELOC_ARC_TLS_IE_GOT +ENUMX + BFD_RELOC_ARC_TLS_DTPOFF +ENUMX + BFD_RELOC_ARC_TLS_DTPOFF_S9 +ENUMX + BFD_RELOC_ARC_TLS_LE_S9 +ENUMX + BFD_RELOC_ARC_TLS_LE_32 +ENUMX + BFD_RELOC_ARC_S25W_PCREL_PLT +ENUMX + BFD_RELOC_ARC_S21H_PCREL_PLT ENUMDOC - ARC 26 bit absolute branch. The lowest two bits must be zero and are not - stored in the instruction. The high 24 bits are installed in bits 23 - through 0. + ARC relocs. ENUM BFD_RELOC_BFIN_16_IMM |