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author | Zack Weinberg <zackw@panix.com> | 2005-05-18 05:40:12 +0000 |
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committer | Zack Weinberg <zackw@panix.com> | 2005-05-18 05:40:12 +0000 |
commit | c19d120533277585363d82db26dec8f9ff603d0f (patch) | |
tree | d17b3c388d043d7edf85359239d7d5c53ac5a50d /bfd/reloc.c | |
parent | 76ff342d252acc41e28986a6d6e5f96a8ce3adf5 (diff) | |
download | gdb-c19d120533277585363d82db26dec8f9ff603d0f.zip gdb-c19d120533277585363d82db26dec8f9ff603d0f.tar.gz gdb-c19d120533277585363d82db26dec8f9ff603d0f.tar.bz2 |
include/elf:
* arm.h: Import complete list of official relocation names
and numbers from AAELF. Define FAKE_RELOCs for old names.
Remove a few old names no longer used anywhere.
bfd:
* elf32-arm.c: Wherever possible, use official reloc names
from AAELF.
(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
Add many new relocations from AAELF.
(elf32_arm_howto_from_type): Update to match.
(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
(elf32_arm_final_link_relocate): Add support for
R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove
case entries redundant with default.
* reloc.c: Reorganize ARM relocations. Add Thumb
assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
* bfd-in2.h, libbfd.h: Regenerate.
opcodes:
* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
instructions. Adjust disassembly of some opcodes to match
unified syntax.
(thumb32_opcodes): New table.
(print_insn_thumb): Rename print_insn_thumb16; don't handle
two-halfword branches here.
(print_insn_thumb32): New function.
(print_insn): Choose among print_insn_arm, print_insn_thumb16,
and print_insn_thumb32. Be consistent about order of
halfwords when printing 32-bit instructions.
gas:
* hash.c (hash_lookup): Add len parameter. All callers changed.
(hash_find_n): New interface.
* hash.h: Prototype hash_find_n.
* sb.c: Include as.h.
(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
(sb_scrub_and_add_sb): New interface.
* sb.h: Prototype sb_scrub_and_add_sb.
* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
reference to BFD_RELOC_ARM_GOT12 which is never generated.
* config/tc-arm.c: Rewrite, adding Thumb-2 support.
gas/testsuite:
* gas/arm/arm.exp: Convert all existing "gas_test" tests to
"run_dump_test" tests. Run more tests unconditionally. Run new tests.
* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
Adjust to work as a dump test.
* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
New files.
* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
diagnostics that don't happen in the first pass anymore.
* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
* gas/arm/vfp-bad.l:
Update expected diagnostics.
* gas/arm/pic.d: Update expected reloc name.
* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
* gas/arm/r15-bad.s: Avoid two-argument mul.
* gas/arm/req.s: Adjust comments.
* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
use of PC.
* gas/arm/macro-1.d, gas/arm/macro1.s
* gas/arm/t16-bad.l, gas/arm/t16-bad.s
* gas/arm/tcompat.d, gas/arm/tcompat.s
* gas/arm/tcompat2.d, gas/arm/tcompat2.s
* gas/arm/thumb32.d, gas/arm/thumb32.s
New test pair.
ld/testsuite:
* ld-arm/mixed-app.d: Adjust expected disassembly a little.
Diffstat (limited to 'bfd/reloc.c')
-rw-r--r-- | bfd/reloc.c | 163 |
1 files changed, 94 insertions, 69 deletions
diff --git a/bfd/reloc.c b/bfd/reloc.c index e2e8a52..078529d 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -2635,104 +2635,139 @@ ENUMDOC Thumb 22 bit pc-relative branch. The lowest bit must be zero and is not stored in the instruction. The 2nd lowest bit comes from a 1 bit field in the instruction. + ENUM - BFD_RELOC_ARM_IMMEDIATE + BFD_RELOC_THUMB_PCREL_BRANCH7 ENUMX - BFD_RELOC_ARM_ADRL_IMMEDIATE + BFD_RELOC_THUMB_PCREL_BRANCH9 ENUMX - BFD_RELOC_ARM_OFFSET_IMM + BFD_RELOC_THUMB_PCREL_BRANCH12 ENUMX - BFD_RELOC_ARM_SHIFT_IMM + BFD_RELOC_THUMB_PCREL_BRANCH20 ENUMX - BFD_RELOC_ARM_SMI + BFD_RELOC_THUMB_PCREL_BRANCH23 ENUMX - BFD_RELOC_ARM_SWI + BFD_RELOC_THUMB_PCREL_BRANCH25 +ENUMDOC + Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches. + The lowest bit must be zero and is not stored in the instruction. + Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an + "nn" one smaller in all cases. Note further that BRANCH23 + corresponds to R_ARM_THM_CALL. + +ENUM + BFD_RELOC_ARM_OFFSET_IMM +ENUMDOC + 12-bit immediate offset, used in ARM-format ldr and str instructions. + +ENUM + BFD_RELOC_ARM_THUMB_OFFSET +ENUMDOC + 5-bit immediate offset, used in Thumb-format ldr and str instructions. + +ENUM + BFD_RELOC_ARM_TARGET1 +ENUMDOC + Pc-relative or absolute relocation depending on target. Used for + entries in .init_array sections. +ENUM + BFD_RELOC_ARM_ROSEGREL32 +ENUMDOC + Read-only segment base relative address. +ENUM + BFD_RELOC_ARM_SBREL32 +ENUMDOC + Data segment base relative address. +ENUM + BFD_RELOC_ARM_TARGET2 +ENUMDOC + This reloc is used for references to RTTI data from exception handling + tables. The actual definition depends on the target. It may be a + pc-relative or some form of GOT-indirect relocation. +ENUM + BFD_RELOC_ARM_PREL31 +ENUMDOC + 31-bit PC relative address. + +ENUM + BFD_RELOC_ARM_JUMP_SLOT ENUMX - BFD_RELOC_ARM_MULTI + BFD_RELOC_ARM_GLOB_DAT ENUMX - BFD_RELOC_ARM_CP_OFF_IMM + BFD_RELOC_ARM_GOT32 ENUMX - BFD_RELOC_ARM_CP_OFF_IMM_S2 + BFD_RELOC_ARM_PLT32 ENUMX - BFD_RELOC_ARM_ADR_IMM + BFD_RELOC_ARM_RELATIVE ENUMX - BFD_RELOC_ARM_LDR_IMM + BFD_RELOC_ARM_GOTOFF ENUMX - BFD_RELOC_ARM_LITERAL + BFD_RELOC_ARM_GOTPC +ENUMDOC + Relocations for setting up GOTs and PLTs for shared libraries. + +ENUM + BFD_RELOC_ARM_TLS_GD32 ENUMX - BFD_RELOC_ARM_IN_POOL + BFD_RELOC_ARM_TLS_LDO32 ENUMX - BFD_RELOC_ARM_OFFSET_IMM8 + BFD_RELOC_ARM_TLS_LDM32 ENUMX - BFD_RELOC_ARM_HWLITERAL + BFD_RELOC_ARM_TLS_DTPOFF32 ENUMX - BFD_RELOC_ARM_THUMB_ADD + BFD_RELOC_ARM_TLS_DTPMOD32 ENUMX - BFD_RELOC_ARM_THUMB_IMM + BFD_RELOC_ARM_TLS_TPOFF32 ENUMX - BFD_RELOC_ARM_THUMB_SHIFT + BFD_RELOC_ARM_TLS_IE32 ENUMX - BFD_RELOC_ARM_THUMB_OFFSET + BFD_RELOC_ARM_TLS_LE32 +ENUMDOC + ARM thread-local storage relocations. + +ENUM + BFD_RELOC_ARM_IMMEDIATE ENUMX - BFD_RELOC_ARM_GOT12 + BFD_RELOC_ARM_ADRL_IMMEDIATE ENUMX - BFD_RELOC_ARM_GOT32 + BFD_RELOC_ARM_T32_IMMEDIATE ENUMX - BFD_RELOC_ARM_JUMP_SLOT + BFD_RELOC_ARM_SHIFT_IMM ENUMX - BFD_RELOC_ARM_COPY + BFD_RELOC_ARM_SMI ENUMX - BFD_RELOC_ARM_GLOB_DAT + BFD_RELOC_ARM_SWI ENUMX - BFD_RELOC_ARM_PLT32 + BFD_RELOC_ARM_MULTI ENUMX - BFD_RELOC_ARM_RELATIVE + BFD_RELOC_ARM_CP_OFF_IMM ENUMX - BFD_RELOC_ARM_GOTOFF + BFD_RELOC_ARM_CP_OFF_IMM_S2 ENUMX - BFD_RELOC_ARM_GOTPC + BFD_RELOC_ARM_ADR_IMM ENUMX - BFD_RELOC_ARM_TLS_GD32 + BFD_RELOC_ARM_LDR_IMM ENUMX - BFD_RELOC_ARM_TLS_LDO32 + BFD_RELOC_ARM_LITERAL ENUMX - BFD_RELOC_ARM_TLS_LDM32 + BFD_RELOC_ARM_IN_POOL ENUMX - BFD_RELOC_ARM_TLS_DTPOFF32 + BFD_RELOC_ARM_OFFSET_IMM8 ENUMX - BFD_RELOC_ARM_TLS_DTPMOD32 + BFD_RELOC_ARM_T32_OFFSET_U8 ENUMX - BFD_RELOC_ARM_TLS_TPOFF32 + BFD_RELOC_ARM_T32_OFFSET_IMM ENUMX - BFD_RELOC_ARM_TLS_IE32 + BFD_RELOC_ARM_HWLITERAL ENUMX - BFD_RELOC_ARM_TLS_LE32 + BFD_RELOC_ARM_THUMB_ADD +ENUMX + BFD_RELOC_ARM_THUMB_IMM +ENUMX + BFD_RELOC_ARM_THUMB_SHIFT ENUMDOC These relocs are only used within the ARM assembler. They are not (at present) written to any object files. -ENUM - BFD_RELOC_ARM_TARGET1 -ENUMDOC - Pc-relative or absolute relocation depending on target. Used for - entries in .init_array sections. -ENUM - BFD_RELOC_ARM_ROSEGREL32 -ENUMDOC - Read-only segment base relative address. -ENUM - BFD_RELOC_ARM_SBREL32 -ENUMDOC - Data segment base relative address. -ENUM - BFD_RELOC_ARM_TARGET2 -ENUMDOC - This reloc is used for References to RTTI dta from exception handling - tables. The actual definition depends on the target. It may be a - pc-relative or some form of GOT-indirect relocation. -ENUM - BFD_RELOC_ARM_PREL31 -ENUMDOC - 31-bit PC relative address. ENUM BFD_RELOC_SH_PCDISP8BY2 @@ -2918,16 +2953,6 @@ ENUMDOC Renesas / SuperH SH relocs. Not all of these appear in object files. ENUM - BFD_RELOC_THUMB_PCREL_BRANCH9 -ENUMX - BFD_RELOC_THUMB_PCREL_BRANCH12 -ENUMX - BFD_RELOC_THUMB_PCREL_BRANCH23 -ENUMDOC - Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must - be zero and is not stored in the instruction. - -ENUM BFD_RELOC_ARC_B22_PCREL ENUMDOC ARC Cores relocs. |