diff options
| author | Xiao Zeng <zengxiao@eswincomputing.com> | 2022-11-21 20:00:37 +0800 |
|---|---|---|
| committer | Nelson Chu <nelson@rivosinc.com> | 2022-11-23 10:46:16 +0800 |
| commit | 06f0a892a5260d8fe93550ed96364cc76fef971d (patch) | |
| tree | df114a3e3a6eb9fbb17363cad0ee1cfd9d3114cb /bfd/elfxx-riscv.c | |
| parent | ba64682044d3828909fd5356f0282abaaefa6425 (diff) | |
| download | gdb-06f0a892a5260d8fe93550ed96364cc76fef971d.zip gdb-06f0a892a5260d8fe93550ed96364cc76fef971d.tar.gz gdb-06f0a892a5260d8fe93550ed96364cc76fef971d.tar.bz2 | |
RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard
According to the riscv psabi, R_RISCV_SUB6 only allows 6 least significant
bits are valid, but since binutils implementation, we usually get 8 bits
field for it. That means, the high 2 bits could be other field and have
different purpose. Therefore, we should filter the 8 bits to 6 bits before
calculate, and then only encode the valid 6 bits back. By the way, we also
need the out-of-range check for R_RISCV_SUB6, and the overflow checks for
all R_RISCV_ADD/SUB/SET relocations, but we can add them in the future patches.
Passing riscv-gnu-toolchain regressions.
bfd/ChangeLog:
* elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6
lower 6 bits as the significant bit.
* elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise.
Diffstat (limited to 'bfd/elfxx-riscv.c')
| -rw-r--r-- | bfd/elfxx-riscv.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index afbde56..ff9607e 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -994,6 +994,10 @@ riscv_elf_add_sub_reloc (bfd *abfd, relocation = old_value + relocation; break; case R_RISCV_SUB6: + relocation = (old_value & ~howto->dst_mask) + | (((old_value & howto->dst_mask) - relocation) + & howto->dst_mask); + break; case R_RISCV_SUB8: case R_RISCV_SUB16: case R_RISCV_SUB32: |