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| author | Christoph Müllner <christoph.muellner@vrull.eu> | 2022-11-22 12:09:27 +0100 |
|---|---|---|
| committer | Nelson Chu <nelson@rivosinc.com> | 2022-11-25 10:00:06 +0800 |
| commit | ac8df5a1921904b3928429e696ad8b40c612f829 (patch) | |
| tree | a557a1a73d53c4a61816074a01a417b0d99ca92c /bfd/elfxx-riscv.c | |
| parent | 18a119b83d1f0f661532e5167af1c5549496759c (diff) | |
| download | gdb-ac8df5a1921904b3928429e696ad8b40c612f829.zip gdb-ac8df5a1921904b3928429e696ad8b40c612f829.tar.gz gdb-ac8df5a1921904b3928429e696ad8b40c612f829.tar.bz2 | |
riscv: Add AIA extension support (Smaia, Ssaia)
This commit adds the AIA extensions (Smaia and Ssaia) CSRs.
bfd/ChangeLog:
* elfxx-riscv.c: Add 'smaia' and 'ssaia' to the list
of known standard extensions.
gas/ChangeLog:
* config/tc-riscv.c (enum riscv_csr_class):
(riscv_csr_address): Add CSR classes for Smaia/Ssaia.
* testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs.
* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
* testsuite/gas/riscv/csr.s: Likewise.
include/ChangeLog:
* opcode/riscv-opc.h (CSR_MISELECT): New CSR macro.
(CSR_MIREG): Likewise.
(CSR_MTOPEI): Likewise.
(CSR_MTOPI): Likewise.
(CSR_MVIEN): Likewise.
(CSR_MVIP): Likewise.
(CSR_MIDELEGH): Likewise.
(CSR_MIEH): Likewise.
(CSR_MVIENH): Likewise.
(CSR_MVIPH): Likewise.
(CSR_MIPH): Likewise.
(CSR_SISELECT): Likewise.
(CSR_SIREG): Likewise.
(CSR_STOPEI): Likewise.
(CSR_STOPI): Likewise.
(CSR_SIEH): Likewise.
(CSR_SIPH): Likewise.
(CSR_HVIEN): Likewise.
(CSR_HVICTL): Likewise.
(CSR_HVIPRIO1): Likewise.
(CSR_HVIPRIO2): Likewise.
(CSR_VSISELECT): Likewise.
(CSR_VSIREG): Likewise.
(CSR_VSTOPEI): Likewise.
(CSR_VSTOPI): Likewise.
(CSR_HIDELEGH): Likewise.
(CSR_HVIENH): Likewise.
(CSR_HVIPH): Likewise.
(CSR_HVIPRIO1H): Likewise.
(CSR_HVIPRIO2H): Likewise.
(CSR_VSIEH): Likewise.
(CSR_VSIPH): Likewise.
(DECLARE_CSR): Add CSRs for Smaia and Ssaia.
Changes for v3:
- Imply ssaia for smaia
- Imply zicsr for ssaia (and transitively smaia)
- Move hypervisor CSRs to Ssaia+H
- Rebase on upstream/master
Changes for v2:
- Add hypervisor and VS CSRs
- Fix whitespace issue
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Diffstat (limited to 'bfd/elfxx-riscv.c')
| -rw-r--r-- | bfd/elfxx-riscv.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index ff9607e..0bcf2fd 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1101,8 +1101,10 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = {"zks", "zbkx", check_implicit_always}, {"zks", "zksed", check_implicit_always}, {"zks", "zksh", check_implicit_always}, + {"smaia", "ssaia", check_implicit_always}, {"smstateen", "ssstateen", check_implicit_always}, {"smepmp", "zicsr", check_implicit_always}, + {"ssaia", "zicsr", check_implicit_always}, {"sscofpmf", "zicsr", check_implicit_always}, {"ssstateen", "zicsr", check_implicit_always}, {"sstc", "zicsr", check_implicit_always}, @@ -1221,8 +1223,10 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = static struct riscv_supported_ext riscv_supported_std_s_ext[] = { + {"smaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"ssstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"sstc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, |