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authorNelson Chu <nelson.chu@sifive.com>2021-09-16 14:36:54 +0800
committerNelson Chu <nelson.chu@sifive.com>2021-09-17 16:33:54 +0800
commitc9f279910113d6a10cb64d81aba2c1af9f3c228c (patch)
treef6c97bc6b142ac2025b70fba59dd491251509310 /bfd/elfnn-riscv.c
parent648d5dc4e6032c66f76638604cd577c529f84bc5 (diff)
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RISC-V: Merged extension string tables and their version tables into one.
There are two main reasons for this patch, * In the past we had two extension tables, one is used to record all supported extensions in bfd/elfxx-riscv.c, another is used to get the default extension versions in gas/config/tc-riscv.c. It is hard to maintain lots of tables in different files, but in fact we can merge them into just one table. Therefore, we now define many riscv_supported_std* tables, which record names and versions for all supported extensions. We not only use these tables to initialize the riscv_ext_order, but also use them to get the default versions of extensions, and decide if the extensions should be enbaled by default. * We add a new filed `default_enable' for the riscv_supported_std* tables, to decide if the extension should be enabled by default. For now if the `default_enable' field of the extension is set to EXT_DEFAULT, then we should enable the extension when the -march and elf architecture attributes are not set. In the future, I suppose the `default_enable' can be set to lots of EXT_<VENDOR>, each vendor can decide to open which extensions, when the target triple of vendor is chosen. The elf/linux regression tests of riscv-gnu-toolchain are passed. bfd/ * elfnn-riscv.c (cpu-riscv.h): Removed sine it is included in bfd/elfxx-riscv.h. (riscv_merge_std_ext): Updated since the field of rpe is changed. * elfxx-riscv.c (cpu-riscv.h): Removed. (riscv_implicit_subsets): Added implicit extensions for g. (struct riscv_supported_ext): Used to be riscv_ext_version. Moved from gas/config/tc-riscv.c, and added new field `default_enable' to decide if the extension should be enabled by default. (EXT_DEFAULT): Defined for `default_enable' field. (riscv_supported_std_ext): It used to return the supported standard architecture string, but now we move ext_version_table from gas/config/tc-riscv.c to here, and rename it to riscv_supported_std_ext. Currently we not only use the table to initialize riscv_ext_order, but also get the default versions of extensions, and decide if the extensions should be enbaled by default. (riscv_supported_std_z_ext): Likewise, but is used for z* extensions. (riscv_supported_std_s_ext): Likewise, but is used for s* extensions. (riscv_supported_std_h_ext): Likewise, but is used for h* extensions. (riscv_supported_std_zxm_ext): Likewise, but is used for zxm* extensions. (riscv_all_supported_ext): Includes all supported extension tables. (riscv_known_prefixed_ext): Updated. (riscv_valid_prefixed_ext): Updated. (riscv_init_ext_order): Init the riscv_ext_order table according to riscv_supported_std_ext. (riscv_get_default_ext_version): Moved from gas/config/tc-riscv.c. Get the versions of extensions from riscv_supported_std* tables. (riscv_parse_add_subset): Updated. (riscv_parse_std_ext): Updated. (riscv_set_default_arch): Set the default subset list according to the default_enable field of riscv_supported_*ext tables. (riscv_parse_subset): If the input ARCH is NULL, then we call riscv_set_default_arch to set the default subset list. * elfxx-riscv.h (cpu-riscv.h): Included. (riscv_parse_subset_t): Removed get_default_version field, and added isa_spec field to replace it. (extern riscv_supported_std_ext): Removed. gas/ * (bfd/cpu-riscv.h): Removed. (struct riscv_ext_version): Renamed and moved to bfd/elfxx-riscv.c. (ext_version_table): Likewise. (riscv_get_default_ext_version): Likewise. (ext_version_hash): Removed. (init_ext_version_hash): Removed. (riscv_set_arch): Updated since the field of rps is changed. Besides, report error when the architecture string is empty. (riscv_after_parse_args): Updated.
Diffstat (limited to 'bfd/elfnn-riscv.c')
-rw-r--r--bfd/elfnn-riscv.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index a10384c..2e8df72 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -32,7 +32,6 @@
#include "elf/riscv.h"
#include "opcode/riscv.h"
#include "objalloc.h"
-#include "cpu-riscv.h"
#include <limits.h>
#ifndef CHAR_BIT
@@ -3443,7 +3442,7 @@ riscv_merge_std_ext (bfd *ibfd,
struct riscv_subset_t **pin,
struct riscv_subset_t **pout)
{
- const char *standard_exts = riscv_supported_std_ext ();
+ const char *standard_exts = "mafdqlcbjtpvn";
const char *p;
struct riscv_subset_t *in = *pin;
struct riscv_subset_t *out = *pout;
@@ -3587,13 +3586,13 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
rpe_in.subset_list = &in_subsets;
rpe_in.error_handler = _bfd_error_handler;
rpe_in.xlen = &xlen_in;
- rpe_in.get_default_version = NULL;
+ rpe_in.isa_spec = ISA_SPEC_CLASS_NONE;
rpe_in.check_unknown_prefixed_ext = false;
rpe_out.subset_list = &out_subsets;
rpe_out.error_handler = _bfd_error_handler;
rpe_out.xlen = &xlen_out;
- rpe_out.get_default_version = NULL;
+ rpe_out.isa_spec = ISA_SPEC_CLASS_NONE;
rpe_out.check_unknown_prefixed_ext = false;
if (in_arch == NULL && out_arch == NULL)