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authorJim Wilson <jimw@sifive.com>2019-03-30 10:12:12 -0700
committerJim Wilson <jimw@sifive.com>2019-03-30 10:12:12 -0700
commitae2b14c73cd42b067e9687219155ed044210f0c1 (patch)
treec92a4bbd4bdb671014ddd4a117f780c6aa458114 /bfd/elfnn-riscv.c
parent7734102d6d8b5a0ccea166f8e944f84dc896b9ae (diff)
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RISC-V: Relax tail/j to c.j for RV64.
2019-03-30 Andrew Waterman <andrew@sifive.com> bfd/ * elfnn-riscv.c (_bfd_riscv_relax_call): Only check ARCH_SIZE for rd == X_RA case.
Diffstat (limited to 'bfd/elfnn-riscv.c')
-rw-r--r--bfd/elfnn-riscv.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index bb114e5..dba1025 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -3416,9 +3416,12 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec,
auipc = bfd_get_32 (abfd, contents + rel->r_offset);
jalr = bfd_get_32 (abfd, contents + rel->r_offset + 4);
rd = (jalr >> OP_SH_RD) & OP_MASK_RD;
- rvc = rvc && VALID_RVC_J_IMM (foff) && ARCH_SIZE == 32;
+ rvc = rvc && VALID_RVC_J_IMM (foff);
- if (rvc && (rd == 0 || rd == X_RA))
+ /* C.J exists on RV32 and RV64, but C.JAL is RV32-only. */
+ rvc = rvc && (rd == 0 || (rd == X_RA && ARCH_SIZE == 32));
+
+ if (rvc)
{
/* Relax to C.J[AL] rd, addr. */
r_type = R_RISCV_RVC_JUMP;