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author | Alan Modra <amodra@gmail.com> | 2022-06-07 22:43:20 +0930 |
---|---|---|
committer | Alan Modra <amodra@gmail.com> | 2022-06-08 21:33:00 +0930 |
commit | c94cb026628b831ef63e3455a66328749ff8a415 (patch) | |
tree | 57ee202b558b82c12ea74e0621928d80008f160d /bfd/elf32-spu.c | |
parent | 3418a349c624257d6a47a299901b9e996469acba (diff) | |
download | gdb-c94cb026628b831ef63e3455a66328749ff8a415.zip gdb-c94cb026628b831ef63e3455a66328749ff8a415.tar.gz gdb-c94cb026628b831ef63e3455a66328749ff8a415.tar.bz2 |
HOWTO size encoding
This changes the HOWTO macro to encode the howto.size field from a
value given in bytes. This of course requires editing all target
uses of HOWTO, a major pain, but makes it a little nicer to specify
new target HOWTOs. Object files before/after this patch are
unchanged in .data and .rodata.
bfd/
* reloc.c (HOWTO_RSIZE): Encode size in bytes.
(EMPTY_HOWTO): Adjust to keep it all zero.
* aout-ns32k.c, * aoutx.h, * coff-alpha.c, * coff-arm.c,
* coff-i386.c, * coff-mcore.c, * coff-mips.c, * coff-rs6000.c,
* coff-sh.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c,
* coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c,
* elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf32-arc.c,
* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
* elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c,
* elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
* elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c,
* elf32-h8300.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c,
* elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c,
* elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c,
* elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c,
* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
* elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c,
* elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s12z.c,
* elf32-s390.c, * elf32-score.c, * elf32-score7.c,
* elf32-sh-relocs.h, * elf32-spu.c, * elf32-tic6x.c,
* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c,
* elf32-visium.c, * elf32-wasm32.c, * elf32-xc16x.c,
* elf32-xgate.c, * elf32-xstormy16.c, * elf32-xtensa.c,
* elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-gen.c,
* elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c,
* elf64-s390.c, * elf64-x86-64.c, * elfn32-mips.c,
* elfnn-aarch64.c, * elfxx-ia64.c, * elfxx-loongarch.c,
* elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c,
* elfxx-tilegx.c, * mach-o-aarch64.c, * mach-o-arm.c,
* mach-o-i386.c, * mach-o-x86-64.c, * pdp11.c, * reloc.c,
* som.c, * vms-alpha.c: Adjust all uses of HOWTO.
* bfd-in2.h: Regenerate.
include/
* elf/arc-reloc.def: Adjust all uses of HOWTO.
Diffstat (limited to 'bfd/elf32-spu.c')
-rw-r--r-- | bfd/elf32-spu.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/bfd/elf32-spu.c b/bfd/elf32-spu.c index 8cad72b..565176e 100644 --- a/bfd/elf32-spu.c +++ b/bfd/elf32-spu.c @@ -40,58 +40,58 @@ static bfd_reloc_status_type spu_elf_rel9 (bfd *, arelent *, asymbol *, array, so it must be declared in the order of that type. */ static reloc_howto_type elf_howto_table[] = { - HOWTO (R_SPU_NONE, 0, 3, 0, false, 0, complain_overflow_dont, + HOWTO (R_SPU_NONE, 0, 0, 0, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_NONE", false, 0, 0x00000000, false), - HOWTO (R_SPU_ADDR10, 4, 2, 10, false, 14, complain_overflow_bitfield, + HOWTO (R_SPU_ADDR10, 4, 4, 10, false, 14, complain_overflow_bitfield, bfd_elf_generic_reloc, "SPU_ADDR10", false, 0, 0x00ffc000, false), - HOWTO (R_SPU_ADDR16, 2, 2, 16, false, 7, complain_overflow_bitfield, + HOWTO (R_SPU_ADDR16, 2, 4, 16, false, 7, complain_overflow_bitfield, bfd_elf_generic_reloc, "SPU_ADDR16", false, 0, 0x007fff80, false), - HOWTO (R_SPU_ADDR16_HI, 16, 2, 16, false, 7, complain_overflow_bitfield, + HOWTO (R_SPU_ADDR16_HI, 16, 4, 16, false, 7, complain_overflow_bitfield, bfd_elf_generic_reloc, "SPU_ADDR16_HI", false, 0, 0x007fff80, false), - HOWTO (R_SPU_ADDR16_LO, 0, 2, 16, false, 7, complain_overflow_dont, + HOWTO (R_SPU_ADDR16_LO, 0, 4, 16, false, 7, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_ADDR16_LO", false, 0, 0x007fff80, false), - HOWTO (R_SPU_ADDR18, 0, 2, 18, false, 7, complain_overflow_bitfield, + HOWTO (R_SPU_ADDR18, 0, 4, 18, false, 7, complain_overflow_bitfield, bfd_elf_generic_reloc, "SPU_ADDR18", false, 0, 0x01ffff80, false), - HOWTO (R_SPU_ADDR32, 0, 2, 32, false, 0, complain_overflow_dont, + HOWTO (R_SPU_ADDR32, 0, 4, 32, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_ADDR32", false, 0, 0xffffffff, false), - HOWTO (R_SPU_REL16, 2, 2, 16, true, 7, complain_overflow_bitfield, + HOWTO (R_SPU_REL16, 2, 4, 16, true, 7, complain_overflow_bitfield, bfd_elf_generic_reloc, "SPU_REL16", false, 0, 0x007fff80, true), - HOWTO (R_SPU_ADDR7, 0, 2, 7, false, 14, complain_overflow_dont, + HOWTO (R_SPU_ADDR7, 0, 4, 7, false, 14, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_ADDR7", false, 0, 0x001fc000, false), - HOWTO (R_SPU_REL9, 2, 2, 9, true, 0, complain_overflow_signed, + HOWTO (R_SPU_REL9, 2, 4, 9, true, 0, complain_overflow_signed, spu_elf_rel9, "SPU_REL9", false, 0, 0x0180007f, true), - HOWTO (R_SPU_REL9I, 2, 2, 9, true, 0, complain_overflow_signed, + HOWTO (R_SPU_REL9I, 2, 4, 9, true, 0, complain_overflow_signed, spu_elf_rel9, "SPU_REL9I", false, 0, 0x0000c07f, true), - HOWTO (R_SPU_ADDR10I, 0, 2, 10, false, 14, complain_overflow_signed, + HOWTO (R_SPU_ADDR10I, 0, 4, 10, false, 14, complain_overflow_signed, bfd_elf_generic_reloc, "SPU_ADDR10I", false, 0, 0x00ffc000, false), - HOWTO (R_SPU_ADDR16I, 0, 2, 16, false, 7, complain_overflow_signed, + HOWTO (R_SPU_ADDR16I, 0, 4, 16, false, 7, complain_overflow_signed, bfd_elf_generic_reloc, "SPU_ADDR16I", false, 0, 0x007fff80, false), - HOWTO (R_SPU_REL32, 0, 2, 32, true, 0, complain_overflow_dont, + HOWTO (R_SPU_REL32, 0, 4, 32, true, 0, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_REL32", false, 0, 0xffffffff, true), - HOWTO (R_SPU_ADDR16X, 0, 2, 16, false, 7, complain_overflow_bitfield, + HOWTO (R_SPU_ADDR16X, 0, 4, 16, false, 7, complain_overflow_bitfield, bfd_elf_generic_reloc, "SPU_ADDR16X", false, 0, 0x007fff80, false), - HOWTO (R_SPU_PPU32, 0, 2, 32, false, 0, complain_overflow_dont, + HOWTO (R_SPU_PPU32, 0, 4, 32, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_PPU32", false, 0, 0xffffffff, false), - HOWTO (R_SPU_PPU64, 0, 4, 64, false, 0, complain_overflow_dont, + HOWTO (R_SPU_PPU64, 0, 8, 64, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_PPU64", false, 0, -1, false), - HOWTO (R_SPU_ADD_PIC, 0, 0, 0, false, 0, complain_overflow_dont, + HOWTO (R_SPU_ADD_PIC, 0, 1, 0, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "SPU_ADD_PIC", false, 0, 0x00000000, false), }; |