aboutsummaryrefslogtreecommitdiff
path: root/bfd/elf32-rx.h
diff options
context:
space:
mode:
authorIgor Tsimbalist <igor.v.tsimbalist@intel.com>2018-01-17 19:45:52 +0300
committerIgor Tsimbalist <igor.v.tsimbalist@intel.com>2018-01-17 19:48:28 +0300
commitd777820bf5abea433c36e956b53b299502e0f708 (patch)
tree16f28c3084e70a09de9fae5527b26d06a4a761fa /bfd/elf32-rx.h
parent4bfce1283654832d83a01b700e61518233c8bbda (diff)
downloadgdb-d777820bf5abea433c36e956b53b299502e0f708.zip
gdb-d777820bf5abea433c36e956b53b299502e0f708.tar.gz
gdb-d777820bf5abea433c36e956b53b299502e0f708.tar.bz2
Replace CET bit with IBT and SHSTK bits.
The latest specification for Intel CET technology defined two new bits instead of previously used CET bit. These are IBT and SHSTK bits. The patch replaces CET bit with IBT and SHSTK bits. gas/ * config/tc-i386.c (cpu_arch): Delete .cet. Add .ibt, .shstk. (cpu_noarch): Add noibt, noshstk. (parse_insn): Change cpucet to cpuibt. * doc/c-i386.texi: Delete .cet. Add .ibt, .shstk. * testsuite/gas/i386/cet-ibt-inval.l: New test. * testsuite/gas/i386/cet-ibt-inval.s: Likewise. * testsuite/gas/i386/cet-shstk-inval.l: Likewise. * testsuite/gas/i386/cet-shstk-inval.s: Likewise. * testsuite/gas/i386/x86-64-cet-ibt-inval.l: Likewise. * testsuite/gas/i386/x86-64-cet-ibt-inval.s: Likewise. * testsuite/gas/i386/x86-64-cet-shstk-inval.l: Likewise. * testsuite/gas/i386/x86-64-cet-shstk-inval.s: Likewise. opcodes/ * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET. Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS, CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK. (cpu_flags): Add CpuIBT, CpuSHSTK. * i386-opc.h (enum): Add CpuIBT, CpuSHSTK. (i386_cpu_flags): Add cpuibt, cpushstk. * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT. * i386-init.h: Regenerate. * i386-tbl.h: Likewise.
Diffstat (limited to 'bfd/elf32-rx.h')
0 files changed, 0 insertions, 0 deletions