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author | H.J. Lu <hjl.tools@gmail.com> | 2015-08-12 04:32:43 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2015-08-12 04:32:43 -0700 |
commit | 1b7868733d45220e63b72a1814f30e090f761821 (patch) | |
tree | 3d24590c5f365841d2c9097339fa33b53f1a373a /bfd/elf32-msp430.c | |
parent | aa91aff6af9f930bb8e9e4fd3dfc852cba8c80d0 (diff) | |
download | gdb-1b7868733d45220e63b72a1814f30e090f761821.zip gdb-1b7868733d45220e63b72a1814f30e090f761821.tar.gz gdb-1b7868733d45220e63b72a1814f30e090f761821.tar.bz2 |
Remove trailing spaces in bfd
Diffstat (limited to 'bfd/elf32-msp430.c')
-rw-r--r-- | bfd/elf32-msp430.c | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/bfd/elf32-msp430.c b/bfd/elf32-msp430.c index 83bb9ce..4d50cab 100644 --- a/bfd/elf32-msp430.c +++ b/bfd/elf32-msp430.c @@ -215,7 +215,7 @@ static reloc_howto_type elf_msp430_howto_table[] = FALSE, /* partial_inplace */ 0xffffffff, /* src_mask */ 0xffffffff, /* dst_mask */ - FALSE) /* pcrel_offset */ + FALSE) /* pcrel_offset */ }; static reloc_howto_type elf_msp430x_howto_table[] = @@ -473,7 +473,7 @@ static reloc_howto_type elf_msp430x_howto_table[] = TRUE), /* pcrel_offset */ EMPTY_HOWTO (R_MSP430_EHTYPE), - + /* A 10 bit PC relative relocation. */ HOWTO (R_MSP430X_10_PCREL, /* type */ 1, /* rightshift */ @@ -518,7 +518,7 @@ static reloc_howto_type elf_msp430x_howto_table[] = FALSE, /* partial_inplace */ 0xffffffff, /* src_mask */ 0xffffffff, /* dst_mask */ - FALSE) /* pcrel_offset */ + FALSE) /* pcrel_offset */ }; /* Map BFD reloc types to MSP430 ELF reloc types. */ @@ -739,7 +739,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, if (sym_diff_section != NULL) { BFD_ASSERT (sym_diff_section == input_section); - + if (uses_msp430x_relocs (input_bfd)) switch (howto->type) { @@ -778,7 +778,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, default: return bfd_reloc_dangerous; } - + sym_diff_section = NULL; } @@ -854,7 +854,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16; addend |= bfd_get_16 (input_bfd, contents + 6); srel += addend; - + } else srel += rel->r_addend; @@ -1050,7 +1050,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, srel += rel->r_addend; x = srel; if (x > 0xffff) - return bfd_reloc_overflow; + return bfd_reloc_overflow; bfd_put_16 (input_bfd, srel & 0xffff, contents); break; @@ -1062,7 +1062,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, srel += rel->r_addend; bfd_put_16 (input_bfd, (srel >> 16) & 0xffff, contents); break; - + case R_MSP430X_PCR20_CALL: /* [0,4]+[16,16] = ---F FFFF*/ contents += rel->r_offset; @@ -1085,7 +1085,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, x = (x & 0xfff0) | (srel & 0xf); bfd_put_16 (input_bfd, x, contents); break; - + case R_MSP430X_PCR16: contents += rel->r_offset; srel = (bfd_signed_vma) relocation; @@ -1098,7 +1098,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, input_section->output_offset); bfd_put_16 (input_bfd, srel & 0xffff, contents); break; - + case R_MSP430_PREL31: contents += rel->r_offset; srel = (bfd_signed_vma) relocation; @@ -1111,7 +1111,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, x = (x & 0x80000000) | ((srel >> 31) & 0x7fffffff); bfd_put_32 (input_bfd, x, contents); break; - + default: r = _bfd_final_link_relocate (howto, input_bfd, input_section, contents, rel->r_offset, @@ -1152,7 +1152,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, } return bfd_reloc_overflow; } - + x = bfd_get_16 (input_bfd, contents); x = (x & 0xfc00) | (srel & 0x3ff); bfd_put_16 (input_bfd, x, contents); @@ -1240,7 +1240,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, bfd_put_8 (input_bfd, srel & 0xff, contents); break; - + case R_MSP430_SYM_DIFF: /* Cache the input section and value. The offset is unreliable, since relaxation may @@ -1465,7 +1465,7 @@ elf32_msp430_object_p (bfd * abfd) case E_MSP430_MACH_MSP430X: e_set = bfd_mach_msp430x; break; } } - + return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set); } @@ -1633,7 +1633,7 @@ msp430_elf_relax_adjust_locals (bfd * abfd, asection * sec, bfd_vma addr, && lsym->st_shndx == sec_shndx) irel->r_addend -= count; } - + return TRUE; } @@ -1682,7 +1682,7 @@ msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr, for (p = abfd->sections; p != NULL; p = p->next) msp430_elf_relax_adjust_locals (abfd,p,addr,count,sec_shndx,toaddr); - + /* Adjust the local symbols defined in this section. */ symtab_hdr = & elf_tdata (abfd)->symtab_hdr; isym = (Elf_Internal_Sym *) symtab_hdr->contents; @@ -1696,7 +1696,7 @@ msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr, if (isym->st_shndx != sec_shndx) continue; - + if (isym->st_value > addr && (isym->st_value < toaddr /* We also adjust a symbol at the end of the section if its name is @@ -1784,7 +1784,7 @@ msp430_elf_relax_add_two_words (bfd * abfd, asection * sec, bfd_vma addr, /* Update the section information. */ sec->size += 4; - elf_section_data (sec)->this_hdr.contents = contents; + elf_section_data (sec)->this_hdr.contents = contents; /* Adjust all the relocs. */ irel = elf_section_data (sec)->relocs; @@ -1827,7 +1827,7 @@ msp430_elf_relax_add_two_words (bfd * abfd, asection * sec, bfd_vma addr, return contents; } - + static bfd_boolean msp430_elf_relax_section (bfd * abfd, asection * sec, struct bfd_link_info * link_info, @@ -1967,7 +1967,7 @@ msp430_elf_relax_section (bfd * abfd, asection * sec, /* Get the opcode. */ opcode = bfd_get_16 (abfd, contents + irel->r_offset); - + /* Compute the new opcode. We are going to convert: J<cond> label into: @@ -1976,7 +1976,7 @@ msp430_elf_relax_section (bfd * abfd, asection * sec, 1: */ switch (opcode & 0xfc00) { - case 0x3800: opcode = 0x3402; break; /* Jl -> Jge +2 */ + case 0x3800: opcode = 0x3402; break; /* Jl -> Jge +2 */ case 0x3400: opcode = 0x3802; break; /* Jge -> Jl +2 */ case 0x2c00: opcode = 0x2802; break; /* Jhs -> Jlo +2 */ case 0x2800: opcode = 0x2c02; break; /* Jlo -> Jhs +2 */ @@ -2007,7 +2007,7 @@ msp430_elf_relax_section (bfd * abfd, asection * sec, /* Insert the new branch instruction. */ if (uses_msp430x_relocs (abfd)) { - /* Insert an absolute branch (aka MOVA) instruction. */ + /* Insert an absolute branch (aka MOVA) instruction. */ contents = msp430_elf_relax_add_two_words (abfd, sec, irel->r_offset + 2, 0x0080, 0x0000); @@ -2114,7 +2114,7 @@ msp430_elf_relax_section (bfd * abfd, asection * sec, /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative branch. */ - /* Paranoia? paranoia... */ + /* Paranoia? paranoia... */ if (! uses_msp430x_relocs (abfd) && ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL) { @@ -2237,7 +2237,7 @@ msp430_elf_relax_section (bfd * abfd, asection * sec, value -= (sec->output_section->vma + sec->output_offset); value -= irel->r_offset; value += irel->r_addend; - + /* See if the value will fit in 10 bits, note the high value is 1016 as the target will be two bytes closer if we are able to relax. */ @@ -2505,7 +2505,7 @@ elf32_msp430_merge_mspabi_attributes (bfd *ibfd, bfd *obfd) data_model (in_attr[OFBA_MSPABI_Tag_Data_Model].i)); result = FALSE; } - + return result; } @@ -2559,7 +2559,7 @@ elf32_msp430_eh_frame_address_size (bfd *abfd, asection *sec ATTRIBUTE_UNUSED) type relocations for other relocations." But it also says that: - + "Certain relocations are identified as Rela only. [snip] Where Rela is specified, an implementation must honor this requirement." @@ -2617,7 +2617,7 @@ elf32_msp430_eh_frame_address_size (bfd *abfd, asection *sec ATTRIBUTE_UNUSED) #undef elf32_bed #define elf32_bed elf32_msp430_ti_bed -#undef ELF_OSABI +#undef ELF_OSABI #define ELF_OSABI ELFOSABI_NONE static const struct bfd_elf_special_section msp430_ti_elf_special_sections[] = |