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authorMichael Eager <eager@eagercon.com>2012-11-14 17:05:24 +0000
committerMichael Eager <eager@eagercon.com>2012-11-14 17:05:24 +0000
commitd3da77419a529a0af2c3e5109bebed65752bc52f (patch)
treef243496979f4234e3783a6c5215a8cb3f0660e93 /bfd/elf32-mep.c
parented8ec0ec784e7e2fd114f4a14e2751add8942c9c (diff)
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opcodes/
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5, update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5, and increase MAX_OPCODES. (op_code_struct): add mbar and sleep * microblaze-opcm.h (microblaze_instr): add mbar Define IMM_MBAR and IMM5_MBAR_MASK * microblaze-dis.c: Add get_field_imm5_mbar (print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE gas/ * config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5 gas/testsuite/ * gas/microblaze/allinsn.s: Add mbar and sleep * gas/microblaze/allinsn.d: Likewise
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