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authorH.J. Lu <hjl.tools@gmail.com>2013-01-10 20:03:55 +0000
committerH.J. Lu <hjl.tools@gmail.com>2013-01-10 20:03:55 +0000
commit68ffbac672c0d7f2566e715f878e65ed9b44795f (patch)
tree4211e1358520c5ca4865cc2227a12998f73eb90d /bfd/elf32-cr16.c
parent34bca50861dd6a0d59b8f8b215865e3a52895191 (diff)
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Remove trailing white spaces in bfd
* aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
Diffstat (limited to 'bfd/elf32-cr16.c')
-rw-r--r--bfd/elf32-cr16.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/bfd/elf32-cr16.c b/bfd/elf32-cr16.c
index 46769f5..2c05023 100644
--- a/bfd/elf32-cr16.c
+++ b/bfd/elf32-cr16.c
@@ -761,7 +761,7 @@ cr16_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection *sec,
{
srelgot = bfd_get_linker_section (dynobj, ".rela.got");
if (srelgot == NULL)
- {
+ {
flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
| SEC_IN_MEMORY | SEC_LINKER_CREATED
| SEC_READONLY);
@@ -912,7 +912,7 @@ cr16_elf_final_link_relocate (reloc_howto_type *howto,
/* We only care about the addend, where the difference between
expressions is kept. */
Rvalue = 0;
-
+
default:
break;
}
@@ -1043,7 +1043,7 @@ cr16_elf_final_link_relocate (reloc_howto_type *howto,
| ((Rvalue >> 16) & 0xf)), hit_data);
bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
}
- else if (r_type == R_CR16_GOT_REGREL20)
+ else if (r_type == R_CR16_GOT_REGREL20)
{
asection * sgot = bfd_get_linker_section (dynobj, ".got");
@@ -1060,7 +1060,7 @@ cr16_elf_final_link_relocate (reloc_howto_type *howto,
-Bsymbolic link and the symbol is defined
locally, or the symbol was forced to be local
because of a version file. We must initialize
- this entry in the global offset table.
+ this entry in the global offset table.
When doing a dynamic link, we create a .rela.got
relocation entry to initialize the value. This
is done in the finish_dynamic_symbol routine. */
@@ -1080,7 +1080,7 @@ cr16_elf_final_link_relocate (reloc_howto_type *howto,
Rvalue += addend;
- /* REVISIT: if ((long) Rvalue > 0xffffff ||
+ /* REVISIT: if ((long) Rvalue > 0xffffff ||
(long) Rvalue < -0x800000). */
if ((long) Rvalue > 0xffffff || (long) Rvalue < 0)
return bfd_reloc_overflow;
@@ -1111,7 +1111,7 @@ cr16_elf_final_link_relocate (reloc_howto_type *howto,
-Bsymbolic link and the symbol is defined
locally, or the symbol was forced to be local
because of a version file. We must initialize
- this entry in the global offset table.
+ this entry in the global offset table.
When doing a dynamic link, we create a .rela.got
relocation entry to initialize the value. This
is done in the finish_dynamic_symbol routine. */
@@ -1142,7 +1142,7 @@ cr16_elf_final_link_relocate (reloc_howto_type *howto,
Rvalue += Rvalue1;
/* Check for range. */
- /* REVISIT: if ((long) Rvalue > 0xffffff
+ /* REVISIT: if ((long) Rvalue > 0xffffff
|| (long) Rvalue < -0x800000). */
if ((long) Rvalue > 0xffffff || (long) Rvalue < 0)
return bfd_reloc_overflow;
@@ -1224,7 +1224,7 @@ cr16_elf_final_link_relocate (reloc_howto_type *howto,
}
else if (r_type == R_CR16_NUM32)
{
- Rvalue1 = (bfd_get_32 (input_bfd, hit_data));
+ Rvalue1 = (bfd_get_32 (input_bfd, hit_data));
/* Add or subtract the offset value */
if (Rvalue1 & 0x80000000)
@@ -1309,7 +1309,7 @@ elf32_cr16_relax_delete_bytes (struct bfd_link_info *link_info, bfd *abfd,
&& ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH16
&& ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH32)
continue;
-
+
r_symndx = ELF32_R_SYM (irel->r_info);
rsym = (Elf_Internal_Sym *) symtab_hdr->contents + r_symndx;
@@ -1981,7 +1981,7 @@ elf32_cr16_relax_section (bfd *abfd, asection *sec,
bfd_vma value = symval;
unsigned short is_add_mov = 0;
bfd_vma value1 = 0;
-
+
/* Get the existing value from the mcode */
value1 = ((bfd_get_32 (abfd, contents + irel->r_offset + 2) >> 16)
|(((bfd_get_32 (abfd, contents + irel->r_offset + 2) & 0xffff) << 16)));
@@ -1996,7 +1996,7 @@ elf32_cr16_relax_section (bfd *abfd, asection *sec,
/* Verify it's a 'arithmetic ADDD or MOVD instruction'.
For ADDD and MOVD only, convert to IMM32 -> IMM20. */
-
+
if (((code & 0xfff0) == 0x0070) || ((code & 0xfff0) == 0x0020))
is_add_mov = 1;
@@ -2016,7 +2016,7 @@ elf32_cr16_relax_section (bfd *abfd, asection *sec,
bfd_put_8 (abfd, (code & 0xf) << 4, contents + irel->r_offset);
- /* If existing value is nagavive adjust approriately
+ /* If existing value is nagavive adjust approriately
place the 16-20bits (ie 4 bit) in new opcode,
as the 0xffffxxxx, the higher 2 byte values removed. */
if (value1 & 0x80000000)
@@ -2040,7 +2040,7 @@ elf32_cr16_relax_section (bfd *abfd, asection *sec,
}
/* See if the value will fit in 16 bits. */
- if ((!is_add_mov)
+ if ((!is_add_mov)
&& ((long)(value + value1) < 0x7fff && (long)(value + value1) > 0))
{
unsigned short code;
@@ -2065,7 +2065,7 @@ elf32_cr16_relax_section (bfd *abfd, asection *sec,
bfd_put_8 (abfd, 0xb0 | (code & 0xf), contents + irel->r_offset);
- /* If existing value is nagavive adjust approriately
+ /* If existing value is nagavive adjust approriately
place the 12-16bits (ie 4 bit) in new opcode,
as the 0xfffffxxx, the higher 2 byte values removed. */
if (value1 & 0x80000000)
@@ -2092,7 +2092,7 @@ elf32_cr16_relax_section (bfd *abfd, asection *sec,
#if 0
/* Try to turn a 16bit immediate address into a 4bit
immediate address. */
- if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
+ if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
|| (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM16))
{
bfd_vma value = symval;
@@ -2200,7 +2200,7 @@ elf32_cr16_relax_section (bfd *abfd, asection *sec,
else
/* Cache the section contents for elf_link_input_bfd. */
elf_section_data (sec)->this_hdr.contents = contents;
-
+
}
if (internal_relocs != NULL