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author | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2017-06-24 10:48:08 +0100 |
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committer | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2017-06-24 10:48:08 +0100 |
commit | bff0500d7abc215bbc6d4e9332047c023f4ce2cb (patch) | |
tree | 2baed8141bed5169ed6f67404de9001910ad0fc4 /bfd/elf32-arm.c | |
parent | ced40572e478927f43a849d5c39f794868da8d38 (diff) | |
download | gdb-bff0500d7abc215bbc6d4e9332047c023f4ce2cb.zip gdb-bff0500d7abc215bbc6d4e9332047c023f4ce2cb.tar.gz gdb-bff0500d7abc215bbc6d4e9332047c023f4ce2cb.tar.bz2 |
[ARM] Add linker support for ARMv8-R
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to add support for ARMv8-R in the linker.
=== Patch description ===
This patch is composed of 3 changes:
1) The main change is the addition of the logic for merging a file whose
Tag_CPU_arch build attribute is 15 (ARMv8-R). Namely, all pre-ARMv8 are
merged into ARMv8-R as well as ARMv8-R itself. ARMv8-A (14) merges into
ARMv8-A. ARMv8-M Baseline (16) and Mainline (17) are not allowed to
merge merge with ARMv8-R. Note that merging only occurs if the two
profiles are identical or one is S (Application or Realtime) and the
other is R.
2) using_thumb_only, using_thumb2_bl, using_thumb2 and arch_has_arm_nop
are updated according to capabilities of ARMv8-R and their BFD_ASSERT
updated to reflect that the logic is valid for ARMv8-R.
3) 2 build attribute merging tests are added to test the first change.
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Update list of architectures in
BFD_ASSERT for which the logic is valid.
(using_thumb2_bl): Likewise.
(using_thumb2): Likewise and return true for ARMv8-R.
(arch_has_arm_nop): Likewise.
(tag_cpu_arch_combine): New v8r table for ARMv8-R Tag_CPU_arch
merging logic. Update commentis for value 15 of v8m_baseline,
v8m_mainline and v4t_plus_v6_m arrays. Use v8r array to decide
merging of value 15 of Tag_CPU_arch.
ld/
* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 11): New test.
(EABI attribute merging 12): Likewise.
* testsuite/ld-arm/attr-merge-11a.s: New file.
* testsuite/ld-arm/attr-merge-11b.s: New file.
* testsuite/ld-arm/attr-merge-11.attr: New file.
* testsuite/ld-arm/attr-merge-12a.s: New file.
* testsuite/ld-arm/attr-merge-12b.s: New file.
* testsuite/ld-arm/attr-merge-12.attr: New file.
Diffstat (limited to 'bfd/elf32-arm.c')
-rw-r--r-- | bfd/elf32-arm.c | 47 |
1 files changed, 30 insertions, 17 deletions
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index e499b0e..b9f5d04 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -3567,9 +3567,7 @@ using_thumb_only (struct elf32_arm_link_hash_table *globals) arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); /* Force return logic to be reviewed for each new architecture. */ - BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 - || arch == TAG_CPU_ARCH_V8M_BASE - || arch == TAG_CPU_ARCH_V8M_MAIN); + BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M @@ -3596,14 +3594,13 @@ using_thumb2 (struct elf32_arm_link_hash_table *globals) arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); /* Force return logic to be reviewed for each new architecture. */ - BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 - || arch == TAG_CPU_ARCH_V8M_BASE - || arch == TAG_CPU_ARCH_V8M_MAIN); + BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7 || arch == TAG_CPU_ARCH_V7E_M || arch == TAG_CPU_ARCH_V8 + || arch == TAG_CPU_ARCH_V8R || arch == TAG_CPU_ARCH_V8M_MAIN); } @@ -3616,9 +3613,7 @@ using_thumb2_bl (struct elf32_arm_link_hash_table *globals) bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); /* Force return logic to be reviewed for each new architecture. */ - BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 - || arch == TAG_CPU_ARCH_V8M_BASE - || arch == TAG_CPU_ARCH_V8M_MAIN); + BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */ return (arch == TAG_CPU_ARCH_V6T2 @@ -3824,14 +3819,13 @@ arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) Tag_CPU_arch); /* Force return logic to be reviewed for each new architecture. */ - BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 - || arch == TAG_CPU_ARCH_V8M_BASE - || arch == TAG_CPU_ARCH_V8M_MAIN); + BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V6K || arch == TAG_CPU_ARCH_V7 - || arch == TAG_CPU_ARCH_V8); + || arch == TAG_CPU_ARCH_V8 + || arch == TAG_CPU_ARCH_V8R); } static bfd_boolean @@ -13329,6 +13323,25 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, T(V8), /* V7E_M. */ T(V8) /* V8. */ }; + const int v8r[] = + { + T(V8R), /* PRE_V4. */ + T(V8R), /* V4. */ + T(V8R), /* V4T. */ + T(V8R), /* V5T. */ + T(V8R), /* V5TE. */ + T(V8R), /* V5TEJ. */ + T(V8R), /* V6. */ + T(V8R), /* V6KZ. */ + T(V8R), /* V6T2. */ + T(V8R), /* V6K. */ + T(V8R), /* V7. */ + T(V8R), /* V6_M. */ + T(V8R), /* V6S_M. */ + T(V8R), /* V7E_M. */ + T(V8), /* V8. */ + T(V8R), /* V8R. */ + }; const int v8m_baseline[] = { -1, /* PRE_V4. */ @@ -13346,7 +13359,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, T(V8M_BASE), /* V6S_M. */ -1, /* V7E_M. */ -1, /* V8. */ - -1, + -1, /* V8R. */ T(V8M_BASE) /* V8-M BASELINE. */ }; const int v8m_mainline[] = @@ -13366,7 +13379,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, T(V8M_MAIN), /* V6S_M. */ T(V8M_MAIN), /* V7E_M. */ -1, /* V8. */ - -1, + -1, /* V8R. */ T(V8M_MAIN), /* V8-M BASELINE. */ T(V8M_MAIN) /* V8-M MAINLINE. */ }; @@ -13387,7 +13400,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, T(V6S_M), /* V6S_M. */ T(V7E_M), /* V7E_M. */ T(V8), /* V8. */ - -1, /* Unused. */ + -1, /* V8R. */ T(V8M_BASE), /* V8-M BASELINE. */ T(V8M_MAIN), /* V8-M MAINLINE. */ T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ @@ -13401,7 +13414,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, v6s_m, v7e_m, v8, - NULL, + v8r, v8m_baseline, v8m_mainline, /* Pseudo-architecture. */ |