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authorAlan Modra <amodra@gmail.com>2019-03-28 10:36:55 +1030
committerAlan Modra <amodra@gmail.com>2019-03-28 15:21:05 +1030
commit96a86c01d119372f4af5aff2501d3104e6c1a8e3 (patch)
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parent072029171354eee0e2f90527196ddda5a85e98c1 (diff)
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PR24390, Don't decode mtfsb field as a cr field
"mtfsb0 4*cr7+lt" doesn't make all that much sense, but unfortunately glibc uses just that instead of "mtfsb0 28" to clear the fpscr xe bit. So for backwards compatibility accept cr field expressions when assembling mtfsb operands, but disassemble to a plain number. PR 24390 include/ * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment. opcodes/ * ppc-opc.c (BTF): Define. (powerpc_opcodes): Use for mtfsb*. * ppc-dis.c (print_insn_powerpc): Print fields with both PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number. gas/ * testsuite/gas/ppc/476.d: Update mtfsb*. * testsuite/gas/ppc/a2.d: Likewise.
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