diff options
| author | Alan Modra <amodra@gmail.com> | 2017-09-09 21:55:22 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2017-09-10 01:55:16 +0930 |
| commit | 2420fff633eff03ec1f85eba82a926cd0ecf4229 (patch) | |
| tree | ce52c69c7236e211580be3aa4da6692022bbe0bc /bfd/cpu-tic6x.c | |
| parent | c5bce5c69721af8dae5c607e085e545cdba33ab1 (diff) | |
| download | gdb-2420fff633eff03ec1f85eba82a926cd0ecf4229.zip gdb-2420fff633eff03ec1f85eba82a926cd0ecf4229.tar.gz gdb-2420fff633eff03ec1f85eba82a926cd0ecf4229.tar.bz2 | |
PowerPC64 --plt-align
This changes the PowerPC64 --plt-align option to perform the usual
alignment of code as suggested by its name, as well as the previous
behaviour of padding so as to reduce boundary crossing. The old
behaviour is had by using a negative parameter.
The default is also changed to align plt stub code by default to 32
byte boundaries, the point being to get better bctr branch prediction
on power8 and power9 hardware.
bfd/
* elf64-ppp.c (plt_stub_pad): Handle positive and negative
plt_stub_align.
ld/
* ld.texinfo (--plt-align): Describe new behaviour of option.
* emultempl/ppc64elf.em (params): Default plt_stub_align to 5.
* testsuite/ld-powerpc/powerpc.exp: Pass --no-plt-align for
selected tests.
* testsuite/ld-powerpc/relbrlt.d: Pass --no-plt-align.
* testsuite/ld-powerpc/elfv2so.d: Adjust expected output.
Diffstat (limited to 'bfd/cpu-tic6x.c')
0 files changed, 0 insertions, 0 deletions