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author | Alan Modra <amodra@gmail.com> | 2021-03-31 10:30:54 +1030 |
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committer | Alan Modra <amodra@gmail.com> | 2021-03-31 10:49:23 +1030 |
commit | 0a1b45a20eaa98d4d9026dc1fd17e79e741183af (patch) | |
tree | 059b2b296b4d60784a82cd6a52dae47dcac4d66a /bfd/cpu-riscv.c | |
parent | faa7a26040c617a6d29f601998b99a1da882c672 (diff) | |
download | gdb-0a1b45a20eaa98d4d9026dc1fd17e79e741183af.zip gdb-0a1b45a20eaa98d4d9026dc1fd17e79e741183af.tar.gz gdb-0a1b45a20eaa98d4d9026dc1fd17e79e741183af.tar.bz2 |
Use bool in bfd
* sysdep.h: POISON_BFD_BOOLEAN: Define.
* aix5ppc-core.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h,
* aoutx.h, * arc-got.h, * archive.c, * archive64.c, * archures.c,
* bfd-in.h, * bfd.c, * bfdwin.c, * binary.c, * cache.c,
* coff-alpha.c, * coff-arm.c, * coff-arm.h, * coff-bfd.c,
* coff-bfd.h, * coff-go32.c, * coff-i386.c, * coff-ia64.c,
* coff-mcore.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c,
* coff-stgo32.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c,
* coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c,
* coffcode.h, * coffgen.c, * cofflink.c, * compress.c,
* corefile.c, * cpu-aarch64.c, * cpu-aarch64.h, * cpu-alpha.c,
* cpu-arc.c, * cpu-arm.c, * cpu-arm.h, * cpu-avr.c, * cpu-bfin.c,
* cpu-bpf.c, * cpu-cr16.c, * cpu-cris.c, * cpu-crx.c,
* cpu-csky.c, * cpu-d10v.c, * cpu-d30v.c, * cpu-dlx.c,
* cpu-epiphany.c, * cpu-fr30.c, * cpu-frv.c, * cpu-ft32.c,
* cpu-h8300.c, * cpu-hppa.c, * cpu-i386.c, * cpu-ia64.c,
* cpu-iamcu.c, * cpu-ip2k.c, * cpu-iq2000.c, * cpu-k1om.c,
* cpu-l1om.c, * cpu-lm32.c, * cpu-m10200.c, * cpu-m10300.c,
* cpu-m32c.c, * cpu-m32r.c, * cpu-m68hc11.c, * cpu-m68hc12.c,
* cpu-m68k.c, * cpu-m9s12x.c, * cpu-m9s12xg.c, * cpu-mcore.c,
* cpu-mep.c, * cpu-metag.c, * cpu-microblaze.c, * cpu-mips.c,
* cpu-mmix.c, * cpu-moxie.c, * cpu-msp430.c, * cpu-mt.c,
* cpu-nds32.c, * cpu-nfp.c, * cpu-nios2.c, * cpu-ns32k.c,
* cpu-or1k.c, * cpu-pdp11.c, * cpu-pj.c, * cpu-powerpc.c,
* cpu-pru.c, * cpu-riscv.c, * cpu-rl78.c, * cpu-rs6000.c,
* cpu-rx.c, * cpu-s12z.c, * cpu-s390.c, * cpu-score.c,
* cpu-sh.c, * cpu-sparc.c, * cpu-spu.c, * cpu-tic30.c,
* cpu-tic4x.c, * cpu-tic54x.c, * cpu-tic6x.c, * cpu-tilegx.c,
* cpu-tilepro.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-vax.c,
* cpu-visium.c, * cpu-wasm32.c, * cpu-xc16x.c, * cpu-xgate.c,
* cpu-xstormy16.c, * cpu-xtensa.c, * cpu-z80.c, * cpu-z8k.c,
* dwarf1.c, * dwarf2.c, * ecoff-bfd.h, * ecoff.c, * ecofflink.c,
* elf-attrs.c, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h,
* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-nacl.c,
* elf-nacl.h, * elf-properties.c, * elf-s390-common.c,
* elf-s390.h, * elf-strtab.c, * elf-vxworks.c, * elf-vxworks.h,
* elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c,
* elf32-arm.h, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c,
* elf32-bfin.h, * elf32-cr16.c, * elf32-cr16.h, * elf32-cris.c,
* elf32-crx.c, * elf32-csky.c, * elf32-csky.h, * elf32-d10v.c,
* elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
* elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c,
* elf32-h8300.c, * elf32-hppa.c, * elf32-hppa.h, * elf32-i386.c,
* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
* elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c,
* elf32-m68k.h, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c,
* elf32-metag.h, * elf32-microblaze.c, * elf32-mips.c,
* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
* elf32-nios2.c, * elf32-nios2.h, * elf32-or1k.c, * elf32-pj.c,
* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
* elf32-rx.c, * elf32-s12z.c, * elf32-s390.c, * elf32-score.c,
* elf32-score.h, * elf32-score7.c, * elf32-sh-relocs.h,
* elf32-sh.c, * elf32-sparc.c, * elf32-spu.c, * elf32-spu.h,
* elf32-tic6x.c, * elf32-tic6x.h, * elf32-tilegx.c,
* elf32-tilepro.c, * elf32-v850.c, * elf32-v850.h,
* elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c,
* elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c,
* elf32-xtensa.c, * elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c,
* elf64-gen.c, * elf64-hppa.c, * elf64-ia64-vms.c,
* elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c,
* elf64-ppc.h, * elf64-s390.c, * elf64-sparc.c,
* elf64-tilegx.c, * elf64-x86-64.c, * elfcode.h,
* elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c,
* elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c,
* elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h,
* elfxx-mips.c, * elfxx-mips.h, * elfxx-riscv.c, * elfxx-riscv.h,
* elfxx-sparc.c, * elfxx-sparc.h, * elfxx-target.h,
* elfxx-tilegx.c, * elfxx-tilegx.h, * elfxx-x86.c, * elfxx-x86.h,
* format.c, * genlink.h, * hash.c, * i386aout.c, * i386lynx.c,
* i386msdos.c, * ihex.c, * libaout.h, * libbfd-in.h,
* libbfd.c, * libcoff-in.h, * libecoff.h, * libpei.h,
* libxcoff.h, * linker.c, * mach-o-aarch64.c, * mach-o-arm.c,
* mach-o-i386.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h,
* merge.c, * mmo.c, * netbsd.h, * opncls.c, * pc532-mach.c,
* pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-sh.c,
* pe-x86_64.c, * peXXigen.c, * pef.c, * pei-arm.c, * pei-i386.c,
* pei-ia64.c, * pei-mcore.c, * pei-sh.c, * pei-x86_64.c,
* peicode.h, * plugin.c, * plugin.h, * ppcboot.c, * reloc.c,
* reloc16.c, * rs6000-core.c, * section.c, * simple.c, * som.c,
* som.h, * srec.c, * stabs.c, * syms.c, * targets.c, * tekhex.c,
* verilog.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * vms.h,
* wasm-module.c, * xcofflink.c, * xcofflink.h, * xsym.c,
* xsym.h: Replace bfd_boolean with bool, FALSE with false, and
TRUE with true throughout.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* libcoff.h: Regenerate.
Diffstat (limited to 'bfd/cpu-riscv.c')
-rw-r--r-- | bfd/cpu-riscv.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/bfd/cpu-riscv.c b/bfd/cpu-riscv.c index ce87ccf..025e94a 100644 --- a/bfd/cpu-riscv.c +++ b/bfd/cpu-riscv.c @@ -39,11 +39,11 @@ riscv_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b) /* Return TRUE if STRING matches the architecture described by INFO. */ -static bfd_boolean +static bool riscv_scan (const struct bfd_arch_info *info, const char *string) { if (bfd_default_scan (info, string)) - return TRUE; + return true; /* The incoming STRING might take the form of riscv:rvXXzzz, where XX is 32 or 64, and zzz are one or more extension characters. As we @@ -59,9 +59,9 @@ riscv_scan (const struct bfd_arch_info *info, const char *string) if (!info->the_default && strncasecmp (string, info->printable_name, strlen (info->printable_name)) == 0) - return TRUE; + return true; - return FALSE; + return false; } #define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \ @@ -95,13 +95,13 @@ enum and each entry except the last should end with NN (my enum value). */ static const bfd_arch_info_type arch_info_struct[] = { - N (64, bfd_mach_riscv64, "riscv:rv64", FALSE, NN (I_riscv64)), - N (32, bfd_mach_riscv32, "riscv:rv32", FALSE, NULL) + N (64, bfd_mach_riscv64, "riscv:rv64", false, NN (I_riscv64)), + N (32, bfd_mach_riscv32, "riscv:rv32", false, NULL) }; /* The default architecture is riscv:rv64. */ const bfd_arch_info_type bfd_riscv_arch = - N (64, 0, "riscv", TRUE, &arch_info_struct[0]); + N (64, 0, "riscv", true, &arch_info_struct[0]); /* List for all supported ISA spec versions. */ const struct riscv_spec riscv_isa_specs[] = |