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authorNick Clifton <nickc@redhat.com>2019-09-10 15:20:58 +0100
committerNick Clifton <nickc@redhat.com>2019-09-10 15:20:58 +0100
commitaebcfb76fc165795e67917cb67cf985c4dfdc577 (patch)
tree3c4539161437c15ad09750a9cfc7e0696f3a2986 /bfd/cpu-powerpc.c
parentefd0b3103f0fbbaa8dac86d82263b46a88b27461 (diff)
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Enhance the disassembler so that it will reliably determine whether a reloc applies to the middle of the next insn.
PR 24907 binutils* objdump.c (null_print): New function. (disassemble_bytes): Delete previous_octets local and replace with a test of the max_reloc_offset_into_insn field of the bfd_arch_info structure. If a reloc is a potential match for the next insn, then perform a dummy disassembly in order to calculate its real length. bfd * archures.c (bfd_arch_info_type): Add max_reloc_offset_into_insn field. (bfd_default_arch_struct): Initialise the new field. * bfd-in2.h: Regenerate. * cpu-aarch64.c: Initialise the new field. * cpu-alpha.c: Likewise. * cpu-arc.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-bpf.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-cris.c: Likewise. * cpu-crx.c: Likewise. * cpu-csky.c: Likewise. * cpu-d10v.c: Likewise. * cpu-d30v.c: Likewise. * cpu-dlx.c: Likewise. * cpu-epiphany.c: Likewise. * cpu-fr30.c: Likewise. * cpu-frv.c: Likewise. * cpu-ft32.c: Likewise. * cpu-h8300.c: Likewise. * cpu-hppa.c: Likewise. * cpu-i386.c: Likewise. * cpu-ia64.c: Likewise. * cpu-iamcu.c: Likewise. * cpu-ip2k.c: Likewise. * cpu-iq2000.c: Likewise. * cpu-k1om.c: Likewise. * cpu-l1om.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m10200.c: Likewise. * cpu-m10300.c: Likewise. * cpu-m32c.c: Likewise. * cpu-m32r.c: Likewise. * cpu-m68hc11.c: Likewise. * cpu-m68hc12.c: Likewise. * cpu-m68k.c: Likewise. * cpu-m9s12x.c: Likewise. * cpu-m9s12xg.c: Likewise. * cpu-mcore.c: Likewise. * cpu-mep.c: Likewise. * cpu-metag.c: Likewise. * cpu-microblaze.c: Likewise. * cpu-mips.c: Likewise. * cpu-mmix.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-mt.c: Likewise. * cpu-nds32.c: Likewise. * cpu-nfp.c: Likewise. * cpu-nios2.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-or1k.c: Likewise. * cpu-pdp11.c: Likewise. * cpu-pj.c: Likewise. * cpu-plugin.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-pru.c: Likewise. * cpu-riscv.c: Likewise. * cpu-rl78.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-rx.c: Likewise. * cpu-s12z.c: Likewise. * cpu-s390.c: Likewise. * cpu-score.c: Likewise. * cpu-sh.c: Likewise. * cpu-sparc.c: Likewise. * cpu-spu.c: Likewise. * cpu-tic30.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-tic54x.c: Likewise. * cpu-tic6x.c: Likewise. * cpu-tic80.c: Likewise. * cpu-tilegx.c: Likewise. * cpu-tilepro.c: Likewise. * cpu-v850.c: Likewise. * cpu-v850_rh850.c: Likewise. * cpu-vax.c: Likewise. * cpu-visium.c: Likewise. * cpu-wasm32.c: Likewise. * cpu-xc16x.c: Likewise. * cpu-xgate.c: Likewise. * cpu-xstormy16.c: Likewise. * cpu-xtensa.c: Likewise. * cpu-z80.c: Likewise. * cpu-z8k.c: Likewise. gas * testsuite/gas/arm/pr24907.s: New test. * testsuite/gas/arm/pr24907.d: Expected disassembly.
Diffstat (limited to 'bfd/cpu-powerpc.c')
-rw-r--r--bfd/cpu-powerpc.c401
1 files changed, 50 insertions, 351 deletions
diff --git a/bfd/cpu-powerpc.c b/bfd/cpu-powerpc.c
index bfe4868..4959467 100644
--- a/bfd/cpu-powerpc.c
+++ b/bfd/cpu-powerpc.c
@@ -48,375 +48,74 @@ powerpc_compatible (const bfd_arch_info_type *a,
/*NOTREACHED*/
}
+#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
+ { \
+ BITS, /* Bits in a word. */ \
+ BITS, /* Bits in an address. */ \
+ 8, /* Bits in a byte. */ \
+ bfd_arch_powerpc, \
+ NUMBER, \
+ "powerpc", \
+ PRINT, \
+ 3, /* Section alignment power. */ \
+ DEFAULT, \
+ powerpc_compatible, \
+ bfd_default_scan, \
+ bfd_arch_default_fill, \
+ NEXT, \
+ 0 /* Maximum offset of a reloc from the start of an insn. */ \
+ }
+
const bfd_arch_info_type bfd_powerpc_archs[] =
{
#if BFD_DEFAULT_TARGET_SIZE == 64
- /* Default arch must come first. */
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc64,
- "powerpc",
- "powerpc:common64",
- 3,
- TRUE, /* default for 64 bit target */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[1]
- },
+ /* Default for 64 bit target. */
+ N (64, bfd_mach_ppc64, "powerpc:common64", TRUE, bfd_powerpc_archs + 1),
/* elf32-ppc:ppc_elf_object_p relies on the default 32 bit arch
being immediately after the 64 bit default. */
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc, /* for the POWER/PowerPC common architecture */
- "powerpc",
- "powerpc:common",
- 3,
- FALSE,
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[2],
- },
+ N (32, bfd_mach_ppc, "powerpc:common", FALSE, bfd_powerpc_archs + 2),
#else
/* Default arch must come first. */
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc, /* for the POWER/PowerPC common architecture */
- "powerpc",
- "powerpc:common",
- 3,
- TRUE, /* default for 32 bit target */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[1],
- },
+ N (32, bfd_mach_ppc, "powerpc:common", TRUE, bfd_powerpc_archs + 1),
/* elf64-ppc:ppc64_elf_object_p relies on the default 64 bit arch
being immediately after the 32 bit default. */
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc64,
- "powerpc",
- "powerpc:common64",
- 3,
- FALSE,
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[2]
- },
+ N (64, bfd_mach_ppc64, "powerpc:common64", FALSE, bfd_powerpc_archs + 2),
#endif
+ N (32, bfd_mach_ppc_603, "powerpc:603", FALSE, bfd_powerpc_archs + 3),
+ N (32, bfd_mach_ppc_ec603e, "powerpc:EC603e", FALSE, bfd_powerpc_archs + 4),
+ N (32, bfd_mach_ppc_604, "powerpc:604", FALSE, bfd_powerpc_archs + 5),
+ N (32, bfd_mach_ppc_403, "powerpc:403", FALSE, bfd_powerpc_archs + 6),
+ N (32, bfd_mach_ppc_601, "powerpc:601", FALSE, bfd_powerpc_archs + 7),
+ N (64, bfd_mach_ppc_620, "powerpc:620", FALSE, bfd_powerpc_archs + 8),
+ N (64, bfd_mach_ppc_630, "powerpc:630", FALSE, bfd_powerpc_archs + 9),
+ N (64, bfd_mach_ppc_a35, "powerpc:a35", FALSE, bfd_powerpc_archs + 10),
+ N (64, bfd_mach_ppc_rs64ii, "powerpc:rs64ii", FALSE, bfd_powerpc_archs + 11),
+ N (64, bfd_mach_ppc_rs64iii, "powerpc:rs64iii", FALSE, bfd_powerpc_archs + 12),
+ N (32, bfd_mach_ppc_7400, "powerpc:7400", FALSE, bfd_powerpc_archs + 13),
+ N (32, bfd_mach_ppc_e500, "powerpc:e500", FALSE, bfd_powerpc_archs + 14),
+ N (32, bfd_mach_ppc_e500mc, "powerpc:e500mc", FALSE, bfd_powerpc_archs + 15),
+ N (64, bfd_mach_ppc_e500mc64, "powerpc:e500mc64",FALSE, bfd_powerpc_archs + 16),
+ N (32, bfd_mach_ppc_860, "powerpc:MPC8XX", FALSE, bfd_powerpc_archs + 17),
+ N (32, bfd_mach_ppc_750, "powerpc:750", FALSE, bfd_powerpc_archs + 18),
+ N (32, bfd_mach_ppc_titan, "powerpc:titan", FALSE, bfd_powerpc_archs + 19),
+
{
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_603,
- "powerpc",
- "powerpc:603",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[3]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_ec603e,
- "powerpc",
- "powerpc:EC603e",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[4]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_604,
- "powerpc",
- "powerpc:604",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[5]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_403,
- "powerpc",
- "powerpc:403",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[6]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_601,
- "powerpc",
- "powerpc:601",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[7]
- },
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_620,
- "powerpc",
- "powerpc:620",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[8]
- },
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_630,
- "powerpc",
- "powerpc:630",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[9]
- },
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_a35,
- "powerpc",
- "powerpc:a35",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[10]
- },
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_rs64ii,
- "powerpc",
- "powerpc:rs64ii",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[11]
- },
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_rs64iii,
- "powerpc",
- "powerpc:rs64iii",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[12]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_7400,
- "powerpc",
- "powerpc:7400",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[13]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_e500,
- "powerpc",
- "powerpc:e500",
- 3,
- FALSE,
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[14]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_e500mc,
- "powerpc",
- "powerpc:e500mc",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[15]
- },
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_e500mc64,
- "powerpc",
- "powerpc:e500mc64",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[16]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_860,
- "powerpc",
- "powerpc:MPC8XX",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[17]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_750,
- "powerpc",
- "powerpc:750",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[18]
- },
- {
- 32, /* 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_titan,
- "powerpc",
- "powerpc:titan",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[19]
- },
- {
- 16, /* 16 or 32 bits in a word */
- 32, /* 32 bits in an address */
- 8, /* 8 bits in a byte */
+ 16, /* Bits in a word. */
+ 32, /* Bits in an address. */
+ 8, /* Bits in a byte. */
bfd_arch_powerpc,
bfd_mach_ppc_vle,
"powerpc",
"powerpc:vle",
3,
- FALSE, /* not the default */
+ FALSE, /* Not the default. */
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
- &bfd_powerpc_archs[20]
+ bfd_powerpc_archs + 20,
+ 0 /* Maximum offset of a reloc from the start of an insn. */
},
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_e5500,
- "powerpc",
- "powerpc:e5500",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &bfd_powerpc_archs[21]
- },
- {
- 64, /* 64 bits in a word */
- 64, /* 64 bits in an address */
- 8, /* 8 bits in a byte */
- bfd_arch_powerpc,
- bfd_mach_ppc_e6500,
- "powerpc",
- "powerpc:e6500",
- 3,
- FALSE, /* not the default */
- powerpc_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- 0
- }
+
+ N (64, bfd_mach_ppc_e5500, "powerpc:e5500", FALSE, bfd_powerpc_archs + 21),
+ N (64, bfd_mach_ppc_e6500, "powerpc:e6500", FALSE, NULL)
};