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authorJim Wilson <jim.wilson@linaro.org>2017-02-14 14:31:03 -0800
committerJim Wilson <jim.wilson@linaro.org>2017-02-14 14:31:03 -0800
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parent3f77c7691fc5ff92eef90f39bb972f25c7422fb0 (diff)
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Add ldn/stn single support, fix ldnr support.
sim/aarch64/ * simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New. (do_vec_LDn_single, do_vec_STn_single): New. (do_vec_LDnR): Add and set new nregs var. Replace switch on nregs with loop over nregs using new var n. Add n times size to address in loop. Add n to vd in loop. (do_vec_load_store): Add comment for instruction bit 24. New var single to hold instruction bit 24. Add new code to use single. Move ldnr support inside single if statements. Fix ldnr register counts inside post if statement. Change HALT_NYI calls to HALT_UNALLOC. sim/testsuite/sim/aarch64/ * ldn_single.s: New. * ldnr.s: New. * stn_single.s: New.
Diffstat (limited to 'bfd/cpu-m10300.c')
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