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author | Kazu Hirata <kazu@codesourcery.com> | 2000-11-16 20:48:09 +0000 |
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committer | Kazu Hirata <kazu@codesourcery.com> | 2000-11-16 20:48:09 +0000 |
commit | 71f6b58639da628af9accaef2b58249c5a60679a (patch) | |
tree | 557a0870099a03523129d43c0d604519cae9fb6b /bfd/cpu-d10v.c | |
parent | 98591c73cf73c16f5bd8709d69700f6970336633 (diff) | |
download | gdb-71f6b58639da628af9accaef2b58249c5a60679a.zip gdb-71f6b58639da628af9accaef2b58249c5a60679a.tar.gz gdb-71f6b58639da628af9accaef2b58249c5a60679a.tar.bz2 |
2000-11-16 Kazu Hirata <kazu@hxi.com>
* cpu-a29k.c: Fix formatting.
* cpu-alpha.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-avr.c: Likewise.
* cpu-d10v.c: Likewise.
* cpu-h8500.c: Likewise.
* cpu-hppa.c: Likewise.
* cpu-i370.c: Likewise.
* cpu-i386.c: Likewise.
* cpu-i960.c: Likewise.
* cpu-ia64-opc.c: Likewise.
* cpu-ia64.c: Likewise.
* cpu-m32r.c: Likewise.
* cpu-m68hc11.c: Likewise.
* cpu-m68hc12.c: Likewise.
* cpu-m68k.c: Likewise.
* cpu-m88k.c: Likewise.
* cpu-mips.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-pj.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-sh.c: Likewise.
* cpu-sparc.c: Likewise.
* cpu-tic54x.c: Likewise.
* cpu-v850.c: Likewise.
* cpu-vax.c: Likewise.
* cpu-w65.c: Likewise.
* cpu-we32k.c: Likewise.
* cpu-z8k.c: Likewise.
Diffstat (limited to 'bfd/cpu-d10v.c')
-rw-r--r-- | bfd/cpu-d10v.c | 76 |
1 files changed, 38 insertions, 38 deletions
diff --git a/bfd/cpu-d10v.c b/bfd/cpu-d10v.c index e16c3b7..868cbcf 100644 --- a/bfd/cpu-d10v.c +++ b/bfd/cpu-d10v.c @@ -22,50 +22,50 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "sysdep.h" #include "libbfd.h" -static const bfd_arch_info_type d10v_ts3_info = -{ - 16, /* 16 bits in a word */ - 16, /* 16 bits in an address */ - 8, /* 8 bits in a byte */ +static const bfd_arch_info_type d10v_ts3_info = +{ + 16, /* 16 bits in a word */ + 16, /* 16 bits in an address */ + 8, /* 8 bits in a byte */ bfd_arch_d10v, - bfd_mach_d10v_ts3, - "d10v", - "d10v:ts3", - 4, /* section alignment power */ - false, - bfd_default_compatible, - bfd_default_scan, - 0, + bfd_mach_d10v_ts3, + "d10v", + "d10v:ts3", + 4, /* section alignment power */ + false, + bfd_default_compatible, + bfd_default_scan, + 0, }; -static const bfd_arch_info_type d10v_ts2_info = +static const bfd_arch_info_type d10v_ts2_info = { - 16, /* 16 bits in a word */ - 16, /* 16 bits in an address */ - 8, /* 8 bits in a byte */ + 16, /* 16 bits in a word */ + 16, /* 16 bits in an address */ + 8, /* 8 bits in a byte */ bfd_arch_d10v, - bfd_mach_d10v_ts2, - "d10v", - "d10v:ts2", - 4, /* section alignment power */ - false, - bfd_default_compatible, - bfd_default_scan, - &d10v_ts3_info, + bfd_mach_d10v_ts2, + "d10v", + "d10v:ts2", + 4, /* section alignment power */ + false, + bfd_default_compatible, + bfd_default_scan, + &d10v_ts3_info, }; -const bfd_arch_info_type bfd_d10v_arch = -{ - 16, /* 16 bits in a word */ - 16, /* 16 bits in an address */ - 8, /* 8 bits in a byte */ +const bfd_arch_info_type bfd_d10v_arch = +{ + 16, /* 16 bits in a word */ + 16, /* 16 bits in an address */ + 8, /* 8 bits in a byte */ bfd_arch_d10v, - bfd_mach_d10v, - "d10v", - "d10v", - 4, /* section alignment power */ - true, - bfd_default_compatible, - bfd_default_scan, - &d10v_ts2_info, + bfd_mach_d10v, + "d10v", + "d10v", + 4, /* section alignment power */ + true, + bfd_default_compatible, + bfd_default_scan, + &d10v_ts2_info, }; |