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authorThomas Preud'homme <thomas.preudhomme@arm.com>2018-07-02 11:22:20 +0100
committerThomas Preud'homme <thomas.preudhomme@arm.com>2018-07-02 11:22:20 +0100
commitc0c468d562649df0f695737262b6230b7a56a4bb (patch)
treeb552074e6d55841d78387bd850ad95966eafcbec /bfd/cpu-arm.c
parenta05a5b64cf33d36d93a92fd03ae900e18dbe5572 (diff)
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[ARM] Update bfd's Tag_CPU_arch knowledge
BFD's bfd_get_mach () function returns a bfd specific value representing the architecture of the target which is populated from the Tag_CPU_arch build attribute value of that target. Among other users of that interfacem, objdump which uses it to print the architecture version of the binary being examinated and to decide what instruction is available if run with "-m arm" via its own mapping from bfd_mach_arm_X values to feature bits available. However, both BFD and objdump's most recent known architecture is Armv5TE. When encountering a newer architecture bfd_get_mach will return bfd_mach_arm_unknown. This is unfortunate since objdump uses that value to allow all instructions on all architectures which is already what it does by default, making the "-m arm" trick useless. This patch updates BFD and objdump's knowledge of Arm architecture versions up to the latest Armv8-M Baseline and Mainline, Armv8-R and Armv8.4-A architectures. Since several architecture versions (eg. 8.X-A) share the same Tag_CPU_arch build attribute value and bfd_mach_arm values, the mapping from bfd machine value to feature bits need to return the most featureful feature bits that would yield the given bfd machine value otherwise some instruction would not disassemble under "-m arm" mode. The patch rework that mapping to make this clearer and simplify writing the mapping rules. In particular, for simplicity all FPU instructions are allowed in all cases. Finally, the patch also rewrite the cpu_arch_ver table in GAS to use the TAG_CPU_ARCH_X macros rather than hardcode their value. 2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * archures.c (bfd_mach_arm_5TEJ, bfd_mach_arm_6, bfd_mach_arm_6KZ, bfd_mach_arm_6T2, bfd_mach_arm_6K, bfd_mach_arm_7, bfd_mach_arm_6M, bfd_mach_arm_6SM, bfd_mach_arm_7EM, bfd_mach_arm_8, bfd_mach_arm_8R, bfd_mach_arm_8M_BASE, bfd_mach_arm_8M_MAIN): Define. * bfd-in2.h: Regenerate. * cpu-arm.c (arch_info_struct): Add entries for above new bfd_mach_arm values. * elf32-arm.c (bfd_arm_get_mach_from_attributes): Add Tag_CPU_arch to bfd_mach_arm mapping logic for pre Armv4 and Armv5TEJ and later architectures. Force assert failure for any new Tag_CPU_arch value. gas/ * config/tc-arm.c (cpu_arch_ver): Use symbolic TAG_CPU_ARCH macros rather than hardcode their values. ld/ * arm-dis.c (select_arm_features): Fix typo in heading comment. Allow all FPU features and add mapping from new bfd_mach_arm values to allowed CPU feature bits. opcodes/ * testsuite/ld-arm/tls-descrelax-be8.d: Add architecture version in expected result. * testsuite/ld-arm/tls-descrelax-v7.d: Likewise. * testsuite/ld-arm/tls-longplt-lib.d: Likewise. * testsuite/ld-arm/tls-longplt.d: Likewise.
Diffstat (limited to 'bfd/cpu-arm.c')
-rw-r--r--bfd/cpu-arm.c41
1 files changed, 27 insertions, 14 deletions
diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c
index c6682d4..4ef409b 100644
--- a/bfd/cpu-arm.c
+++ b/bfd/cpu-arm.c
@@ -129,20 +129,33 @@ scan (const struct bfd_arch_info *info, const char *string)
static const bfd_arch_info_type arch_info_struct[] =
{
- N (bfd_mach_arm_2, "armv2", FALSE, & arch_info_struct[1]),
- N (bfd_mach_arm_2a, "armv2a", FALSE, & arch_info_struct[2]),
- N (bfd_mach_arm_3, "armv3", FALSE, & arch_info_struct[3]),
- N (bfd_mach_arm_3M, "armv3m", FALSE, & arch_info_struct[4]),
- N (bfd_mach_arm_4, "armv4", FALSE, & arch_info_struct[5]),
- N (bfd_mach_arm_4T, "armv4t", FALSE, & arch_info_struct[6]),
- N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
- N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
- N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
- N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]),
- N (bfd_mach_arm_ep9312, "ep9312", FALSE, & arch_info_struct[11]),
- N (bfd_mach_arm_iWMMXt, "iwmmxt", FALSE, & arch_info_struct[12]),
- N (bfd_mach_arm_iWMMXt2, "iwmmxt2", FALSE, & arch_info_struct[13]),
- N (bfd_mach_arm_unknown, "arm_any", FALSE, NULL)
+ N (bfd_mach_arm_2, "armv2", FALSE, & arch_info_struct[1]),
+ N (bfd_mach_arm_2a, "armv2a", FALSE, & arch_info_struct[2]),
+ N (bfd_mach_arm_3, "armv3", FALSE, & arch_info_struct[3]),
+ N (bfd_mach_arm_3M, "armv3m", FALSE, & arch_info_struct[4]),
+ N (bfd_mach_arm_4, "armv4", FALSE, & arch_info_struct[5]),
+ N (bfd_mach_arm_4T, "armv4t", FALSE, & arch_info_struct[6]),
+ N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
+ N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
+ N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
+ N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]),
+ N (bfd_mach_arm_ep9312, "ep9312", FALSE, & arch_info_struct[11]),
+ N (bfd_mach_arm_iWMMXt, "iwmmxt", FALSE, & arch_info_struct[12]),
+ N (bfd_mach_arm_iWMMXt2, "iwmmxt2", FALSE, & arch_info_struct[13]),
+ N (bfd_mach_arm_5TEJ, "armv5tej", FALSE, & arch_info_struct[14]),
+ N (bfd_mach_arm_6, "armv6", FALSE, & arch_info_struct[15]),
+ N (bfd_mach_arm_6KZ, "armv6kz", FALSE, & arch_info_struct[16]),
+ N (bfd_mach_arm_6T2, "armv6t2", FALSE, & arch_info_struct[17]),
+ N (bfd_mach_arm_6K, "armv6k", FALSE, & arch_info_struct[18]),
+ N (bfd_mach_arm_7, "armv7", FALSE, & arch_info_struct[19]),
+ N (bfd_mach_arm_6M, "armv6-m", FALSE, & arch_info_struct[20]),
+ N (bfd_mach_arm_6SM, "armv6s-m", FALSE, & arch_info_struct[21]),
+ N (bfd_mach_arm_7EM, "armv7e-m", FALSE, & arch_info_struct[22]),
+ N (bfd_mach_arm_8, "armv8-a", FALSE, & arch_info_struct[23]),
+ N (bfd_mach_arm_8R, "armv8-r", FALSE, & arch_info_struct[24]),
+ N (bfd_mach_arm_8M_BASE, "armv8-m.base", FALSE, & arch_info_struct[25]),
+ N (bfd_mach_arm_8M_MAIN, "armv8-m.main", FALSE, & arch_info_struct[26]),
+ N (bfd_mach_arm_unknown, "arm_any", FALSE, NULL)
};
const bfd_arch_info_type bfd_arm_arch =