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author | Joseph Myers <joseph@codesourcery.com> | 2006-09-26 12:04:45 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2006-09-26 12:04:45 +0000 |
commit | 2d447fcaa923b78068b74b162a8de91219c03b78 (patch) | |
tree | 9be4f6c49bb83da17a4301d6b6987c1617bae3f7 /bfd/cpu-arm.c | |
parent | 17bcf627ee9d7c7eb33895b9d6f59889370994c4 (diff) | |
download | gdb-2d447fcaa923b78068b74b162a8de91219c03b78.zip gdb-2d447fcaa923b78068b74b162a8de91219c03b78.tar.gz gdb-2d447fcaa923b78068b74b162a8de91219c03b78.tar.bz2 |
bfd/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
Diffstat (limited to 'bfd/cpu-arm.c')
-rw-r--r-- | bfd/cpu-arm.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c index 5c89296..52c359b 100644 --- a/bfd/cpu-arm.c +++ b/bfd/cpu-arm.c @@ -92,7 +92,8 @@ processors[] = { bfd_mach_arm_4, "strongarm1100" }, { bfd_mach_arm_XScale, "xscale" }, { bfd_mach_arm_ep9312, "ep9312" }, - { bfd_mach_arm_iWMMXt, "iwmmxt" } + { bfd_mach_arm_iWMMXt, "iwmmxt" }, + { bfd_mach_arm_iWMMXt2, "iwmmxt2" } }; static bfd_boolean @@ -137,7 +138,8 @@ static const bfd_arch_info_type arch_info_struct[] = N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]), N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]), N (bfd_mach_arm_ep9312, "ep9312", FALSE, & arch_info_struct[11]), - N (bfd_mach_arm_iWMMXt,"iwmmxt", FALSE, NULL) + N (bfd_mach_arm_iWMMXt, "iwmmxt", FALSE, & arch_info_struct[12]), + N (bfd_mach_arm_iWMMXt2, "iwmmxt2", FALSE, NULL) }; const bfd_arch_info_type bfd_arm_arch = @@ -179,7 +181,9 @@ bfd_arm_merge_machines (bfd *ibfd, bfd *obfd) Intel XScale binary, since these architecture have co-processors which will not both be present on the same physical hardware. */ else if (in == bfd_mach_arm_ep9312 - && (out == bfd_mach_arm_XScale || out == bfd_mach_arm_iWMMXt)) + && (out == bfd_mach_arm_XScale + || out == bfd_mach_arm_iWMMXt + || out == bfd_mach_arm_iWMMXt2)) { _bfd_error_handler (_("\ ERROR: %B is compiled for the EP9312, whereas %B is compiled for XScale"), @@ -188,7 +192,9 @@ ERROR: %B is compiled for the EP9312, whereas %B is compiled for XScale"), return FALSE; } else if (out == bfd_mach_arm_ep9312 - && (in == bfd_mach_arm_XScale || in == bfd_mach_arm_iWMMXt)) + && (in == bfd_mach_arm_XScale + || in == bfd_mach_arm_iWMMXt + || in == bfd_mach_arm_iWMMXt2)) { _bfd_error_handler (_("\ ERROR: %B is compiled for the EP9312, whereas %B is compiled for XScale"), @@ -309,6 +315,7 @@ bfd_arm_update_notes (bfd *abfd, const char *note_section) case bfd_mach_arm_XScale: expected = "XScale"; break; case bfd_mach_arm_ep9312: expected = "ep9312"; break; case bfd_mach_arm_iWMMXt: expected = "iWMMXt"; break; + case bfd_mach_arm_iWMMXt2: expected = "iWMMXt2"; break; } if (strcmp (arch_string, expected) != 0) @@ -355,7 +362,8 @@ architectures[] = { "armv5te", bfd_mach_arm_5TE }, { "XScale", bfd_mach_arm_XScale }, { "ep9312", bfd_mach_arm_ep9312 }, - { "iWMMXt", bfd_mach_arm_iWMMXt } + { "iWMMXt", bfd_mach_arm_iWMMXt }, + { "iWMMXt2", bfd_mach_arm_iWMMXt2 } }; /* Extract the machine number stored in a note section. */ |