diff options
| author | Kazu Hirata <kazu@codesourcery.com> | 2003-11-24 18:06:40 +0000 |
|---|---|---|
| committer | Kazu Hirata <kazu@codesourcery.com> | 2003-11-24 18:06:40 +0000 |
| commit | 5c4491d385d6143e64180d906126b6bced69e0d1 (patch) | |
| tree | 4856eabc9994eb4b64abec9002063cf2eb8142eb /bfd/coff-arm.c | |
| parent | 254d758cf9ab0600295a6c54a984048737920b8a (diff) | |
| download | gdb-5c4491d385d6143e64180d906126b6bced69e0d1.zip gdb-5c4491d385d6143e64180d906126b6bced69e0d1.tar.gz gdb-5c4491d385d6143e64180d906126b6bced69e0d1.tar.bz2 | |
* aix5ppc-core.c: Fix comment typos.
* aout-arm.c: Likewise.
* aout-ns32k.c: Likewise.
* aoutx.h: Likewise.
* archures.c: Likewise.
* bfd-in.h: Likewise.
* bfd.c: Likewise.
* bfdio.c: Likewise.
* coff-arm.c: Likewise.
* coff-h8300.c: Likewise.
* coff-i860.c: Likewise.
* coff-m88k.c: Likewise.
* coff-mcore.c: Likewise.
* coff-ppc.c: Likewise.
* coff-rs6000.c: Likewise.
* coff-z8k.c: Likewise.
* coff64-rs6000.c: Likewise.
* coffcode.h: Likewise.
* cofflink.c: Likewise.
* cpu-alpha.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-ns32k.c: Likewise.
* dwarf2.c: Likewise.
* bfd-in2.h: Regenerate.
Diffstat (limited to 'bfd/coff-arm.c')
| -rw-r--r-- | bfd/coff-arm.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/bfd/coff-arm.c b/bfd/coff-arm.c index 3655a30..1d60567 100644 --- a/bfd/coff-arm.c +++ b/bfd/coff-arm.c @@ -921,13 +921,13 @@ struct coff_arm_link_hash_table /* The original coff_link_hash_table structure. MUST be first field. */ struct coff_link_hash_table root; - /* The size in bytes of the section containg the Thumb-to-ARM glue. */ + /* The size in bytes of the section containing the Thumb-to-ARM glue. */ bfd_size_type thumb_glue_size; - /* The size in bytes of the section containg the ARM-to-Thumb glue. */ + /* The size in bytes of the section containing the ARM-to-Thumb glue. */ bfd_size_type arm_glue_size; - /* An arbitary input BFD chosen to hold the glue sections. */ + /* An arbitrary input BFD chosen to hold the glue sections. */ bfd * bfd_of_glue_owner; /* Support interworking with old, non-interworking aware ARM code. */ @@ -991,7 +991,7 @@ arm_emit_base_file_entry (info, output_bfd, input_section, reloc_offset) instruction. It takes two thumb instructions to encode the target address. Each has - 11 bits to invest. The upper 11 bits are stored in one (identifed by + 11 bits to invest. The upper 11 bits are stored in one (identified by H-0.. see below), the lower 11 bits are stored in the other (identified by H-1). @@ -1299,7 +1299,7 @@ coff_arm_relocate_section (output_bfd, info, input_bfd, input_section, /* FIXME - it is not clear which targets need this next test and which do not. It is known that it is needed for the VxWorks and EPOC-PE targets, but it is also known that it - was supressed for other ARM targets. This ought to be + was suppressed for other ARM targets. This ought to be sorted out one day. */ #ifdef ARM_COFF_BUGFIX /* We must not ignore the symbol value. If the symbol is @@ -2228,7 +2228,7 @@ coff_arm_adjust_symndx (obfd, info, ibfd, sec, irel, adjustedp) /* Called when merging the private data areas of two BFDs. This is important as it allows us to detect if we are attempting to merge binaries compiled for different ARM - targets, eg different CPUs or differents APCS's. */ + targets, eg different CPUs or different APCS's. */ static bfd_boolean coff_arm_merge_private_bfd_data (ibfd, obfd) @@ -2361,7 +2361,7 @@ coff_arm_print_private_bfd_data (abfd, ptr) if (APCS_SET (abfd)) { - /* xgettext: APCS is ARM Prodecure Call Standard, it should not be translated. */ + /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */ fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32); if (APCS_FLOAT_FLAG (abfd)) |