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author | Sergey Belyashov <sergey.belyashov@gmail.com> | 2020-02-07 14:53:46 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2020-02-07 14:53:46 +0000 |
commit | 9fc0b501af78bc4a92f53ec712e1aaa123e0224c (patch) | |
tree | f3ef7a39227828252a1878f1a526b3df19ec7c65 /bfd/bfd-in2.h | |
parent | adb8754e48d53b219ddaa9e8368e4b1acb9db53a (diff) | |
download | gdb-9fc0b501af78bc4a92f53ec712e1aaa123e0224c.zip gdb-9fc0b501af78bc4a92f53ec712e1aaa123e0224c.tar.gz gdb-9fc0b501af78bc4a92f53ec712e1aaa123e0224c.tar.bz2 |
Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add DWARF debug info support to the Z80 assembler.
PR 25469
bfd * archures.c: Add GBZ80 and Z80N machine values.
* reloc.c: Add BFD_RELOC_Z80_16_BE.
* coff-z80.c: Add support for new reloc.
* coffcode.h: Add support for new machine values.
* cpu-z80.c: Add support for new machine names.
* elf32-z80.c: Add support for new reloc.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils* readelf.c (get_machine_flags): Add support for Z80N machine
number.
gas * config/tc-z80.c: Add -gbz80 command line option to generate code
for the GameBoy Z80. Add support for generating DWARF.
* config/tc-z80.h: Add support for DWARF debug information
generation.
* doc/c-z80.texi: Document new command line option.
* testsuite/gas/z80/gbz80_all.d: New file.
* testsuite/gas/z80/gbz80_all.s: New file.
* testsuite/gas/z80/z80.exp: Run the new tests.
* testsuite/gas/z80/z80n_all.d: New file.
* testsuite/gas/z80/z80n_all.s: New file.
* testsuite/gas/z80/z80n_reloc.d: New file.
include * coff/internal.h (R_IMM16BE): Define.
* elf/z80.h (EF_Z80_MACH_Z80N): Define.
(R_Z80_16_BE): New reloc.
ld * emulparams/elf32z80.sh: Use z80 emulation.
* emultempl/z80.em: Make generic to both COFF and ELF Z80 emulations.
* emultempl/z80elf.em: Delete.
* testsuite/ld-elf/pr22450.d: Expect to fail for the Z80.
* testsuite/ld-elf/sec64k.exp: Fix Z80 assembly.
* testsuite/ld-unique/pr21529.s: Avoid register name conflict.
* testsuite/ld-unique/unique.s: Likewise.
* testsuite/ld-unique/unique_empty.s: Likewise.
* testsuite/ld-unique/unique_shared.s: Likewise.
* testsuite/ld-unique/unique.d: Updated expected output.
* testsuite/ld-z80/arch_z80n.d: New file.
* testsuite/ld-z80/comb_arch_z80_z80n.d: New file.
* testsuite/ld-z80/labels.s: Add more labels.
* testsuite/ld-z80/relocs.s: Add more reloc tests.
* testsuite/ld-z80/relocs_f_z80n.d: New file
opcodes * z80-dis.c: Add support for GBZ80 opcodes.
Diffstat (limited to 'bfd/bfd-in2.h')
-rw-r--r-- | bfd/bfd-in2.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 2d26b81..180383b 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1897,14 +1897,15 @@ enum bfd_architecture bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ #define bfd_mach_xtensa 1 bfd_arch_z80, -#define bfd_mach_gbz80 0 /* GameBoy Z80 (reduced instruction set) */ -#define bfd_mach_z80strict 1 /* Z80 without undocumented opcodes. */ -#define bfd_mach_z180 2 /* Z180: successor with additional instructions, but without halves of ix and iy */ -#define bfd_mach_z80 3 /* Z80 with ixl, ixh, iyl, and iyh. */ -#define bfd_mach_ez80_z80 4 /* eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode */ -#define bfd_mach_ez80_adl 5 /* eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode */ -#define bfd_mach_z80full 7 /* Z80 with all undocumented instructions. */ -#define bfd_mach_r800 11 /* R800: successor with multiplication. */ +#define bfd_mach_z80strict 1 /* Zilog Z80 without undocumented opcodes. */ +#define bfd_mach_z180 2 /* Zilog Z180: successor with additional instructions, but without halves of ix and iy */ +#define bfd_mach_z80 3 /* Zilog Z80 with ixl, ixh, iyl, and iyh. */ +#define bfd_mach_ez80_z80 4 /* Zilog eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode */ +#define bfd_mach_ez80_adl 5 /* Zilog eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode */ +#define bfd_mach_z80n 6 /* Z80N */ +#define bfd_mach_z80full 7 /* Zilog Z80 with all undocumented instructions. */ +#define bfd_mach_gbz80 8 /* GameBoy Z80 (reduced instruction set) */ +#define bfd_mach_r800 11 /*Ascii R800: Z80 successor with multiplication. */ bfd_arch_lm32, /* Lattice Mico32. */ #define bfd_mach_lm32 1 bfd_arch_microblaze,/* Xilinx MicroBlaze. */ @@ -5301,6 +5302,9 @@ BFD_RELOC_XTENSA_ASM_EXPAND. */ /* Highest 16 bits of multibyte (32 or 24 bit) value. */ BFD_RELOC_Z80_WORD1, +/* 16 bit word big endian */ + BFD_RELOC_Z80_16_BE, + /* DJNZ offset. */ BFD_RELOC_Z8K_DISP7, |