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author | Nick Clifton <nickc@redhat.com> | 2012-05-03 13:12:08 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2012-05-03 13:12:08 +0000 |
commit | f6c1a2d592af15d02c7fc93390af3c803e74c4d9 (patch) | |
tree | 760746b562a8f05f3ea3b8f163304c59ba7b96db /bfd/bfd-in2.h | |
parent | a8acc5fb18af9d4b0da318218680534414325e13 (diff) | |
download | gdb-f6c1a2d592af15d02c7fc93390af3c803e74c4d9.zip gdb-f6c1a2d592af15d02c7fc93390af3c803e74c4d9.tar.gz gdb-f6c1a2d592af15d02c7fc93390af3c803e74c4d9.tar.bz2 |
Add support for Motorola XGATE embedded CPU
Diffstat (limited to 'bfd/bfd-in2.h')
-rw-r--r-- | bfd/bfd-in2.h | 55 |
1 files changed, 54 insertions, 1 deletions
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 17dbbe1..6b94f72 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -2141,7 +2141,9 @@ enum bfd_architecture bfd_arch_xc16x, /* Infineon's XC16X Series. */ #define bfd_mach_xc16x 1 #define bfd_mach_xc16xl 2 -#define bfd_mach_xc16xs 3 +#define bfd_mach_xc16xs 3 + bfd_arch_xgate, /* Freescale XGATE */ +#define bfd_mach_xgate 1 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ #define bfd_mach_xtensa 1 bfd_arch_z80, @@ -4472,6 +4474,57 @@ to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */ This is the 5 bits of a value. */ BFD_RELOC_M68HC12_5B, +/* Freescale XGATE reloc. +This reloc marks the beginning of a bra/jal instruction. */ + BFD_RELOC_XGATE_RL_JUMP, + +/* Freescale XGATE reloc. +This reloc marks a group of several instructions that gcc generates +and for which the linker relaxation pass can modify and/or remove +some of them. */ + BFD_RELOC_XGATE_RL_GROUP, + +/* Freescale XGATE reloc. +This is the 16-bit lower part of an address. It is used for the '16-bit' +instructions. */ + BFD_RELOC_XGATE_LO16, + +/* Freescale XGATE reloc. */ + BFD_RELOC_XGATE_GPAGE, + +/* Freescale XGATE reloc. */ + BFD_RELOC_XGATE_24, + +/* Freescale XGATE reloc. +This is a 9-bit pc-relative reloc. */ + BFD_RELOC_XGATE_PCREL_9, + +/* Freescale XGATE reloc. +This is a 10-bit pc-relative reloc. */ + BFD_RELOC_XGATE_PCREL_10, + +/* Freescale XGATE reloc. +This is the 16-bit lower part of an address. It is used for the '16-bit' +instructions. */ + BFD_RELOC_XGATE_IMM8_LO, + +/* Freescale XGATE reloc. +This is the 16-bit higher part of an address. It is used for the '16-bit' +instructions. */ + BFD_RELOC_XGATE_IMM8_HI, + +/* Freescale XGATE reloc. +This is a 3-bit pc-relative reloc. */ + BFD_RELOC_XGATE_IMM3, + +/* Freescale XGATE reloc. +This is a 4-bit pc-relative reloc. */ + BFD_RELOC_XGATE_IMM4, + +/* Freescale XGATE reloc. +This is a 5-bit pc-relative reloc. */ + BFD_RELOC_XGATE_IMM5, + /* NS CR16C Relocations. */ BFD_RELOC_16C_NUM08, BFD_RELOC_16C_NUM08_C, |