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| author | Renlin Li <renlin.li@arm.com> | 2018-01-18 12:08:40 +0000 |
|---|---|---|
| committer | Renlin Li <renlin.li@arm.com> | 2018-01-24 16:19:47 +0000 |
| commit | 322474019df79a1305e83ff7620a72f31a5c7b55 (patch) | |
| tree | ae7e6030970c16a017c540609ec31f448c6ad32f /bfd/bfd-in2.h | |
| parent | cc40406d1d033abc21de1af5a30f2a5fbb692507 (diff) | |
| download | gdb-322474019df79a1305e83ff7620a72f31a5c7b55.zip gdb-322474019df79a1305e83ff7620a72f31a5c7b55.tar.gz gdb-322474019df79a1305e83ff7620a72f31a5c7b55.tar.bz2 | |
[GAS][AARCH64]Add group relocations to create PC-relative offset.
This is a patch to add the gas support for group relocations to create a
16, 32, 48, or 64 bit PC-relative offset inline.
The following relocations are added along with the test cases:
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
bfd/
2018-01-24 Renlin Li <renlin.li@arm.com>
* reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0,
BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1,
BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2,
BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
gas/
2018-01-24 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): add entries for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
(md_apply_fix): Likewise
* testsuite/gas/aarch64/prel_g0.s: New.
* testsuite/gas/aarch64/prel_g0.d: New.
* testsuite/gas/aarch64/prel_g0_nc.s: New.
* testsuite/gas/aarch64/prel_g0_nc.d: New.
* testsuite/gas/aarch64/prel_g1.s: New.
* testsuite/gas/aarch64/prel_g1.d: New.
* testsuite/gas/aarch64/prel_g1_nc.s: New.
* testsuite/gas/aarch64/prel_g1_nc.d: New.
* testsuite/gas/aarch64/prel_g2.s: New.
* testsuite/gas/aarch64/prel_g2.d: New.
* testsuite/gas/aarch64/prel_g2_nc.s: New.
* testsuite/gas/aarch64/prel_g2_nc.d: New.
* testsuite/gas/aarch64/prel_g3.s: New.
* testsuite/gas/aarch64/prel_g3.d: New.
Diffstat (limited to 'bfd/bfd-in2.h')
| -rw-r--r-- | bfd/bfd-in2.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index f4b3720..42991e7 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -5957,6 +5957,36 @@ of a signed value. Changes instruction to MOVZ or MOVN depending on the value's sign. */ BFD_RELOC_AARCH64_MOVW_G2_S, +/* AArch64 MOV[NZ] instruction with most significant bits 0 to 15 +of a signed value. Changes instruction to MOVZ or MOVN depending on the +value's sign. */ + BFD_RELOC_AARCH64_MOVW_PREL_G0, + +/* AArch64 MOV[NZ] instruction with most significant bits 0 to 15 +of a signed value. Changes instruction to MOVZ or MOVN depending on the +value's sign. */ + BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, + +/* AArch64 MOVK instruction with most significant bits 16 to 31 +of a signed value. */ + BFD_RELOC_AARCH64_MOVW_PREL_G1, + +/* AArch64 MOVK instruction with most significant bits 16 to 31 +of a signed value. */ + BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, + +/* AArch64 MOVK instruction with most significant bits 32 to 47 +of a signed value. */ + BFD_RELOC_AARCH64_MOVW_PREL_G2, + +/* AArch64 MOVK instruction with most significant bits 32 to 47 +of a signed value. */ + BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, + +/* AArch64 MOVK instruction with most significant bits 47 to 63 +of a signed value. */ + BFD_RELOC_AARCH64_MOVW_PREL_G3, + /* AArch64 Load Literal instruction, holding a 19 bit pc-relative word offset. The lowest two bits must be zero and are not stored in the instruction, giving a 21 bit signed byte offset. */ |