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authorJose E. Marchesi <jose.marchesi@oracle.com>2016-06-17 02:12:48 -0700
committerJose E. Marchesi <jose.marchesi@oracle.com>2016-06-17 02:12:48 -0700
commit4f26fb3a1b1369a044ac642d1e82bf6fc6dfa9d9 (patch)
tree1718b3dff20a541796658430968d50849bfa080a /bfd/archures.c
parente7622e5214f5e099641426691d63f8179651e8a5 (diff)
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bfd,opcodes: sparc: new opcode v9{c,d,e,v,m} architectures and bfd machine numbers.
This patch adds support for the opcode architectures SPARC_OPCODE_ARCH_V9{C,D,E,V,M} and its associated BFD machine numbers bfd_mach_sparc_v9{c,d,e,v,m} and bfd_mach_sparc_v8plus{c,d,e,v,m}. Note that for arches up to v9b (UltraSPARC III), the detection of the BFD machine type was based on the bits in the e_machine field of the ELF header. However, there are no more available bits in that field, so this patch takes the approach of using the hardware capabilities stored in the object attributes HWCAPS/HWCAPS2 in order to characterize the machine the object was built for. bfd/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * archures.c (bfd_mach_sparc_v8plusc): Define. (bfd_mach_sparc_v9c): Likewise. (bfd_mach_sparc_v8plusd): Likewise. (bfd_mach_sparc_v9d): Likewise. (bfd_mach_sparc_v8pluse): Likewise. (bfd_mach_sparc_v9e): Likewise. (bfd_mach_sparc_v8plusv): Likewise (bfd_mach_sparc_v9v): Likewise. (bfd_mach_sparc_v8plusm): Likewise. (bfd_mach_sparc_v9m): Likewise. (bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m. (bfd_mach_sparc_64bit_p): Likewise. * bfd-in2.h: Regenerate. * cpu-sparc.c (arch_info_struct): Add entries for bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}. * aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}. * elf32-sparc.c (elf32_sparc_final_write_processing): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise. include/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D, SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and SPARC_OPCODE_ARCH_V9M. opcodes/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}. (compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}. * sparc-opc.c (MASK_V9C): Define. (MASK_V9D): Likewise. (MASK_V9E): Likewise. (MASK_V9V): Likewise. (MASK_V9M): Likewise. (v6): Add MASK_V9{C,D,E,V,M}. (v6notlet): Likewise. (v7): Likewise. (v8): Likewise. (v9): Likewise. (v9andleon): Likewise. (v9a): Likewise. (v9b): Likewise. (v9c): Define. (v9d): Likewise. (v9e): Likewise. (v9v): Likewise. (v9m): Likewise. (sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
Diffstat (limited to 'bfd/archures.c')
-rw-r--r--bfd/archures.c20
1 files changed, 18 insertions, 2 deletions
diff --git a/bfd/archures.c b/bfd/archures.c
index 7ff1e82..a00c712 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -137,13 +137,29 @@ DESCRIPTION
.#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
.#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
.#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
+.#define bfd_mach_sparc_v8plusc 11 {* with UA2005 and T1 add'ns. *}
+.#define bfd_mach_sparc_v9c 12 {* with UA2005 and T1 add'ns. *}
+.#define bfd_mach_sparc_v8plusd 13 {* with UA2007 and T3 add'ns. *}
+.#define bfd_mach_sparc_v9d 14 {* with UA2007 and T3 add'ns. *}
+.#define bfd_mach_sparc_v8pluse 15 {* with OSA2001 and T4 add'ns (no IMA). *}
+.#define bfd_mach_sparc_v9e 16 {* with OSA2001 and T4 add'ns (no IMA). *}
+.#define bfd_mach_sparc_v8plusv 17 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
+.#define bfd_mach_sparc_v9v 18 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
+.#define bfd_mach_sparc_v8plusm 19 {* with OSA2015 and M7 add'ns. *}
+.#define bfd_mach_sparc_v9m 20 {* with OSA2015 and M7 add'ns. *}
.{* Nonzero if MACH has the v9 instruction set. *}
.#define bfd_mach_sparc_v9_p(mach) \
-. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
+. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m \
. && (mach) != bfd_mach_sparc_sparclite_le)
.{* Nonzero if MACH is a 64 bit sparc architecture. *}
.#define bfd_mach_sparc_64bit_p(mach) \
-. ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
+. ((mach) >= bfd_mach_sparc_v9 \
+. && (mach) != bfd_mach_sparc_v8plusb \
+. && (mach) != bfd_mach_sparc_v8plusc \
+. && (mach) != bfd_mach_sparc_v8plusd \
+. && (mach) != bfd_mach_sparc_v8pluse \
+. && (mach) != bfd_mach_sparc_v8plusv \
+. && (mach) != bfd_mach_sparc_v8plusm)
. bfd_arch_spu, {* PowerPC SPU *}
.#define bfd_mach_spu 256
. bfd_arch_mips, {* MIPS Rxxxx *}