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authorAndrew Burgess <andrew.burgess@embecosm.com>2016-03-15 21:51:50 +0000
committerAndrew Burgess <andrew.burgess@embecosm.com>2016-03-21 16:44:49 +0000
commit8699fc3e88de47be12401fd366fbe1ee0c4294c7 (patch)
tree7459f723fbf2994958b03ffb5a6f524525d84381 /bfd/archures.c
parenta9522a2168c8233e8f15c42a32e7376c2a40ac12 (diff)
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arc: Add nps400 machine type, and assembler flag.
This commit introduces the nps400 machine type as a variant of arc. There's a new flag in the assembler to select this machine type. All other changes are just adding handling of the new machine type into the relevant places. The nps400 is an arc700 variant with some vendor specific instructions added into the instruction set. This commit does not add any of the new instructions, this is just laying the groundwork for future commits. However, in preparation for these new instructions a new opcode define for nps400 has been added to include/opcode/arc.h, this new opcode define is used in the assembler and disassembler along with the existing define for arc700 such that when assembling and disassembling for nps400 the user will have access to all arc700 instructions and all the nps400 vendor extension instructions. bfd/ChangeLog: * archures.c (bfd_mach_arc_nps400): Define. * bfd-in2.h: Regenerate. * cpu-arc.c (arch_info_struct): New entry for nps400, renumber some existing entries to make space. * elf32-arc.c (arc_elf_object_p): Add nps400 case. (arc_elf_final_write_processing): Likewise. binutils/ChangeLog: * readelf.c (decode_ARC_machine_flags): Handle nps400. gas/ChangeLog: * config/tc-arc.c (cpu_types): Add nps400 entry. (check_zol): Handle nps400. include/ChangeLog: * elf/arc.h (E_ARC_MACH_NPS400): Define. * opcode/arc.h (ARC_OPCODE_NPS400): Define. opcodes/ChangeLog: * arc-dis.c (print_insn_arc): Handle nps400.
Diffstat (limited to 'bfd/archures.c')
-rw-r--r--bfd/archures.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/bfd/archures.c b/bfd/archures.c
index 12e3342..7ff1e82 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -359,6 +359,7 @@ DESCRIPTION
.#define bfd_mach_arc_arc601 4
.#define bfd_mach_arc_arc700 3
.#define bfd_mach_arc_arcv2 5
+.#define bfd_mach_arc_nps400 6
. bfd_arch_m32c, {* Renesas M16C/M32C. *}
.#define bfd_mach_m16c 0x75
.#define bfd_mach_m32c 0x78