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| author | Jakub Jelinek <jakub@redhat.com> | 2000-10-20 10:38:47 +0000 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2000-10-20 10:38:47 +0000 |
| commit | 19f7b01094d236648a8b0de2ef24cf8510594e9c (patch) | |
| tree | f2b5235c189cdf610e5e892e7e2e8f48df8e2221 /bfd/archures.c | |
| parent | bb160f3e2dc2b422903eca471137e204c55793c2 (diff) | |
| download | gdb-19f7b01094d236648a8b0de2ef24cf8510594e9c.zip gdb-19f7b01094d236648a8b0de2ef24cf8510594e9c.tar.gz gdb-19f7b01094d236648a8b0de2ef24cf8510594e9c.tar.bz2 | |
gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
instructions to loose any special insn->architecture mask.
* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
(sparc_md_end, sparc_arch_types, sparc_arch,
sparc_elf_final_processing): Handle v8plusb and v9b architectures.
(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
request v9b architecture if they are used).
bfd/
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
elf32_sparc_object_p, elf32_sparc_final_write_processing):
Support v8plusb.
* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
sparc64_elf_object_p): Support v9b.
* archures.c: Declare v8plusb and v9b machines.
* bfd-in2.h: Ditto.
* cpu-sparc.c: Ditto.
include/opcode/
* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
Note that '3' is used for siam operand.
opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
* opcodes/sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
Diffstat (limited to 'bfd/archures.c')
| -rw-r--r-- | bfd/archures.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/bfd/archures.c b/bfd/archures.c index 70fa086..5729217 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -109,9 +109,12 @@ DESCRIPTION .#define bfd_mach_sparc_sparclite_le 6 .#define bfd_mach_sparc_v9 7 .#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns *} +.#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns *} +.#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns *} .{* Nonzero if MACH has the v9 instruction set. *} .#define bfd_mach_sparc_v9_p(mach) \ -. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a) +. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ +. && (mach) != bfd_mach_sparc_sparclite_le) . bfd_arch_mips, {* MIPS Rxxxx *} .#define bfd_mach_mips3000 3000 .#define bfd_mach_mips3900 3900 |