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authorYufeng Zhang <yufeng.zhang@arm.com>2013-06-26 10:49:29 +0000
committerYufeng Zhang <yufeng.zhang@arm.com>2013-06-26 10:49:29 +0000
commitcaed712042c10c84bbf25a266988874679813689 (patch)
treeed7ae74e159c7dbf4a0ce45c36aabb69782d96ff /bfd/ChangeLog
parenta6bb11b2df1b69d79828a52a44eaf29ebc4d4955 (diff)
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[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c
bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
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diff --git a/bfd/ChangeLog b/bfd/ChangeLog
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+++ b/bfd/ChangeLog
@@ -1,5 +1,60 @@
2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
+ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c.
+ (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo.
+ * Makefile.in: Re-generated.
+ * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo.
+ (bfd_elf64_littleaarch64_vec): Likewise.
+ (bfd_elf32_bigaarch64_vec): Likewise.
+ (bfd_elf32_littleaarch64_vec): Likewise.
+ * configure: Re-generated.
+ * elfxx-aarch64.c: New file; split from elf64-aarch64.c.
+ * elfxx-aarch64.h: New file.
+ * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following
+ stuff to elfxx-aarch64.c.
+ (bfd_elf_aarch64_put_addend): Removed.
+ (PG_OFFSET, PG): Likewise.
+ (elfNN_aarch64_small_plt0_entry): Support ELF32.
+ (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise.
+ (elf64_aarch64_grok_prstatus): Removed.
+ (elf_backend_grok_prstatus): Removed.
+ (insn32): Likewise.
+ (aarch64_unsigned_overflow): Likewise.
+ (aarch64_signed_overflow): Likewise.
+ (aarch64_resolve_relocation): Likewise.
+ (MASK): Likewise.
+ (decode_branch_ofs_26): Likewise.
+ (decode_cond_branch_ofs_19): Likewise.
+ (decode_ld_lit_ofs_19): Likewise.
+ (decode_tst_branch_ofs_14): Likewise.
+ (decode_movw_imm): Likewise.
+ (decode_adr_imm): Likewise.
+ (decode_add_imm): Likewise.
+ (reencode_branch_ofs_26): Likewise.
+ (reencode_cond_branch_ofs_19): Likewise.
+ (reencode_ld_lit_ofs_19): Likewise.
+ (reencode_tst_branch_ofs_14): Likewise.
+ (reencode_movw_imm): Likewise.
+ (reencode_adr_imm): Likewise.
+ (reencode_ldst_pos_imm): Likewise.
+ (reencode_add_imm): Likewise.
+ (reencode_movzn_to_movz): Likewise.
+ (reencode_movzn_to_movn): Likewise.
+ (aarch64_relocate): Update to call the new function names in
+ elfxx-aarch64.c.
+ (aarch64_calculate_got_entry_vma): Likewise.
+ (elfNN_aarch64_final_link_relocate): Likewise.
+ (elf64_aarch64_update_plt_entry): Likewise; change the type of the
+ parameter 'r_type' to bfd_reloc_code_real_type; rename to ...
+ (elf_aarch64_update_plt_entry): ... this.
+ (elfNN_aarch64_create_small_pltn_entry): Update.
+ (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add
+ bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry.
+ (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to
+ call elf_aarch64_update_plt_entry.
+
+2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
+
* bfd-in2.h: Re-generated.
* elfnn-aarch64.c (HOWTO64, HOWTO32): New define.
(IS_AARCH64_TLS_RELOC): Change to be based on the