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author | Jan Beulich <jbeulich@suse.com> | 2024-06-21 14:39:52 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2024-06-21 14:39:52 +0200 |
commit | fa2c4239f1ab70b198f6d404f727d0d744221595 (patch) | |
tree | 36037743ae009cc65aab80b416dab9517431104a /README | |
parent | 87860ef6f4650d513530af4cb4e3e85a863139cf (diff) | |
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x86: optimize left-shift-by-1
These can be replaced by adds when acting on a register operand.
While for the scalar forms there's no gain in encoding size, ADD
generally has higher throughput than SHL. EFLAGS set by ADD are a
superset of those set by SHL (AF in particular is undefined there).
For the SIMD cases the transformation also reduced code size, by
eliminating the 1-byte immediate from the resulting encoding. Note
that this transformation is not applied by gcc13 (according to my
observations), so would - as of now - even improve compiler generated
code.
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