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| author | Richard Earnshaw <richard.earnshaw@arm.com> | 2012-09-17 17:43:42 +0000 |
|---|---|---|
| committer | Richard Earnshaw <richard.earnshaw@arm.com> | 2012-09-17 17:43:42 +0000 |
| commit | 062f38fa2f1dc0acb90fddd948d87b1d34809d86 (patch) | |
| tree | 214fdc04be42ea595e42e907bc880464f87b01d3 | |
| parent | fe91d94c37769634dd2582ea508a41a9cfd87301 (diff) | |
| download | gdb-062f38fa2f1dc0acb90fddd948d87b1d34809d86.zip gdb-062f38fa2f1dc0acb90fddd948d87b1d34809d86.tar.gz gdb-062f38fa2f1dc0acb90fddd948d87b1d34809d86.tar.bz2 | |
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
the parameter 'inst'.
(aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
(convert_mov_to_movewide): Change to assert (0) when
aarch64_wide_constant_p returns FALSE.
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/aarch64-asm.c | 11 |
2 files changed, 14 insertions, 5 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 102f5df..ab543ca 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com> + + * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from + the parameter 'inst'. + (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'. + (convert_mov_to_movewide): Change to assert (0) when + aarch64_wide_constant_p returns FALSE. + 2012-09-14 David Edelsohn <dje.gcc@gmail.com> * configure: Regenerate. diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index e10240a..006b075 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -336,8 +336,7 @@ aarch64_ins_imm (const aarch64_operand *self, const aarch64_opnd_info *info, MOVZ <Wd>, #<imm16>{, LSL #<shift>}. */ const char * aarch64_ins_imm_half (const aarch64_operand *self, const aarch64_opnd_info *info, - aarch64_insn *code, - const aarch64_inst *inst ATTRIBUTE_UNUSED) + aarch64_insn *code, const aarch64_inst *inst) { /* imm16 */ aarch64_ins_imm (self, info, code, inst); @@ -532,7 +531,8 @@ aarch64_ins_addr_regoff (const aarch64_operand *self ATTRIBUTE_UNUSED, const char * aarch64_ins_addr_simm (const aarch64_operand *self, const aarch64_opnd_info *info, - aarch64_insn *code, const aarch64_inst *inst) + aarch64_insn *code, + const aarch64_inst *inst ATTRIBUTE_UNUSED) { int imm; @@ -1090,8 +1090,9 @@ convert_mov_to_movewide (aarch64_inst *inst) } inst->operands[1].type = AARCH64_OPND_HALF; is32 = inst->operands[0].qualifier == AARCH64_OPND_QLF_W; - /* This should have been guaranteed by the constraint check. */ - assert (aarch64_wide_constant_p (value, is32, &shift_amount) == TRUE); + if (! aarch64_wide_constant_p (value, is32, &shift_amount)) + /* The constraint check should have guaranteed this wouldn't happen. */ + assert (0); value >>= shift_amount; value &= 0xffff; inst->operands[1].imm.value = value; |