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author | Mike Frysinger <vapier@gentoo.org> | 2023-12-24 05:21:30 -0500 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2024-01-01 10:56:08 -0500 |
commit | f793be444cc72d818064b0c9b98ecd25f781a38d (patch) | |
tree | 7720d19175867bae845290952ed1ffbd44eeb993 | |
parent | 361a6d49c6526dcff3b530c8ceefcce95fe1b9d0 (diff) | |
download | gdb-f793be444cc72d818064b0c9b98ecd25f781a38d.zip gdb-f793be444cc72d818064b0c9b98ecd25f781a38d.tar.gz gdb-f793be444cc72d818064b0c9b98ecd25f781a38d.tar.bz2 |
sim: frv: fix cmpb uninitialized variable usage
This code sets up the cc variable based on the comparison of other
registers, but it does so incrementally with bit operations, and it
never initializes the cc variable. Initialize it to 0 which the
cmpba insn is already doing.
-rw-r--r-- | cpu/frv.cpu | 1 | ||||
-rw-r--r-- | sim/frv/sem.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/cpu/frv.cpu b/cpu/frv.cpu index cdb169e..d2fe7c6 100644 --- a/cpu/frv.cpu +++ b/cpu/frv.cpu @@ -4266,6 +4266,7 @@ "cmpb$pack $GRi,$GRj,$ICCi_1" (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj) (sequence ((QI cc)) + (set cc 0) (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000))) (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000))) (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00))) diff --git a/sim/frv/sem.c b/sim/frv/sem.c index 20ac47b..cf47aff 100644 --- a/sim/frv/sem.c +++ b/sim/frv/sem.c @@ -3055,6 +3055,7 @@ SEM_FN_NAME (frvbf,cmpb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { QI tmp_cc; + tmp_cc = 0; if (EQBI (EQSI (ANDSI (GET_H_GR (FLD (f_GRi)), 0xff000000), ANDSI (GET_H_GR (FLD (f_GRj)), 0xff000000)), 0)) { tmp_cc = ANDQI (tmp_cc, 7); } else { |