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authorIan Lance Taylor <ian@airs.com>1996-09-19 19:35:09 +0000
committerIan Lance Taylor <ian@airs.com>1996-09-19 19:35:09 +0000
commitcc5201d78c016dc38c3dfbbb22b1332b80f88589 (patch)
tree7b5ca59ed95bafa29bee750c49c37f79d76a627e
parentaddb61a5b2faa558625249bc18c05dde51ec1809 (diff)
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* gencode.c (process_instructions): Correct handling of nor
instruction.
-rw-r--r--sim/mips/ChangeLog5
-rw-r--r--sim/mips/gencode.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 9acd9c3..3c0099f 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,8 @@
+Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * gencode.c (process_instructions): Correct handling of nor
+ instruction.
+
Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
* interp.c (sim_monitor): Improved monitor printf
diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c
index 1e0dbf7..0dda11c 100644
--- a/sim/mips/gencode.c
+++ b/sim/mips/gencode.c
@@ -1240,7 +1240,7 @@ process_instructions(doarch,features)
break ;
case OR:
- printf(" GPR[destreg] = (%sop1 | op2);\n",((MIPS_DECODE[loop].flags & NOT) ? "~" : ""));
+ printf(" GPR[destreg] = %s(op1 | op2);\n",((MIPS_DECODE[loop].flags & NOT) ? "~" : ""));
break ;
case XOR: