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author | Jan Beulich <jbeulich@suse.com> | 2023-07-04 17:00:15 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2023-07-04 17:00:15 +0200 |
commit | 07d618b91f50816f198abac7df116e83d47ca1be (patch) | |
tree | 17ebc7e92cc911720a1304a3171414bf133da041 | |
parent | bb2bd584f31a25ba1cfe5bdac4d07d8cffe87c3d (diff) | |
download | gdb-07d618b91f50816f198abac7df116e83d47ca1be.zip gdb-07d618b91f50816f198abac7df116e83d47ca1be.tar.gz gdb-07d618b91f50816f198abac7df116e83d47ca1be.tar.bz2 |
x86: re-work EVEX-z-without-masking check
Rather than corrupting disassmbly altogether, flag EVEX.z set as bad
when masking isn't in effect in the first place at the time the
destination operand is actually processed.
-rw-r--r-- | gas/testsuite/gas/i386/avx512f-nondef.d | 3 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 18 |
2 files changed, 9 insertions, 12 deletions
diff --git a/gas/testsuite/gas/i386/avx512f-nondef.d b/gas/testsuite/gas/i386/avx512f-nondef.d index a062fe3..8defd69 100644 --- a/gas/testsuite/gas/i386/avx512f-nondef.d +++ b/gas/testsuite/gas/i386/avx512f-nondef.d @@ -15,8 +15,7 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f2 55 1f 3b f4 vpminud \{rn-bad\},%zmm4,%zmm5,%zmm6\{%k7\} [ ]*[a-f0-9]+: 62 f2 7e 48 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\) [ ]*[a-f0-9]+: 62 f2 7e 58 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)\{bad\} -[ ]*[a-f0-9]+: 62 f1 7c 88 58 \(bad\) -[ ]*[a-f0-9]+: c3 ret +[ ]*[a-f0-9]+: 62 f1 7c 88 58 c3 (\{evex\} )?vaddps %xmm3,%xmm0,%xmm0\{bad\} [ ]*[a-f0-9]+: 62 f2 7d 4f 92 01 vgatherdps \(bad\),%zmm0\{%k7\} [ ]*[a-f0-9]+: 67 62 f2 7d 4f 92 01 addr16 vgatherdps \(bad\),%zmm0\{%k7\} [ ]*[a-f0-9]+: 62 f2 7d cf 92 04 08 vgatherdps \(%eax,%zmm1(,1)?\),%zmm0\{%k7\}\{z\}/\(bad\) diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 15a0e1b..690e336 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -9905,9 +9905,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) oappend (&ins, "{"); oappend_register (&ins, reg_name); oappend (&ins, "}"); + + if (ins.vex.zeroing) + oappend (&ins, "{z}"); + } + else if (ins.vex.zeroing) + { + oappend (&ins, "{bad}"); + continue; } - if (ins.vex.zeroing) - oappend (&ins, "{z}"); /* S/G insns require a mask and don't allow zeroing-masking. */ @@ -9985,14 +9991,6 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) goto out; } - /* If EVEX.z is set, there must be an actual mask register in use. */ - if (ins.vex.zeroing && ins.vex.mask_register_specifier == 0) - { - i386_dis_printf (info, dis_style_text, "(bad)"); - ret = ins.end_codep - priv.the_buffer; - goto out; - } - switch (dp->prefix_requirement) { case PREFIX_DATA: |