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authorMarkus Metzger <markus.t.metzger@intel.com>2016-01-12 10:44:37 +0100
committerMarkus Metzger <markus.t.metzger@intel.com>2016-10-28 10:49:27 +0200
commit63ab433e29b2715f429551cdbec72dab0d752c20 (patch)
treea654babd2cb72b8f699f194bfdd323c162292ae5
parent2fc9bcf136a72ecc56a333cb658a8eaac8c9fec7 (diff)
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btrace: fix gap indication
Trace gaps due to overflows or non-contiguous trace are ignored in the 'info record' command. Fix that. Also add a warning when decoding the trace and print the instruction number preceding the trace gap in that warning message. It looks like this: (gdb) info record Active record target: record-btrace Recording format: Intel Processor Trace. Buffer size: 16kB. warning: Decode error (-13) at instruction 101044 (offset = 0x29f0, pc = 0x7ffff728a642): no memory mapped at this address. Recorded 101044 instructions in 2093 functions (1 gaps) for thread 1 (process 5360). (gdb) record instruction-history 101044 101044 0x00007ffff728a640: pop %r13 [decode error (-13): no memory mapped at this address] Remove the dead code that was supposed to print a gaps warning at the end of trace decode. This isn't really needed since we now print a warning for each gap. gdb/ * btrace.c (ftrace_add_pt): Fix gap indication. Add warning for non- contiguous trace and overflow. Rephrase trace decode warning and print instruction number. Remove dead gaps warning. (btrace_compute_ftrace_bts): Rephrase warnings and print instruction number.
-rw-r--r--gdb/ChangeLog8
-rw-r--r--gdb/btrace.c54
2 files changed, 43 insertions, 19 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 768d166..988a50a 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,11 @@
+2016-10-28 Markus Metzger <markus.t.metzger@intel.com>
+
+ * btrace.c (ftrace_add_pt): Fix gap indication. Add warning for non-
+ contiguous trace and overflow. Rephrase trace decode warning and print
+ instruction number. Remove dead gaps warning.
+ (btrace_compute_ftrace_bts): Rephrase warnings and print instruction
+ number.
+
2016-10-25 Sandra Loosemore <sandra@codesourcery.com>
Luis Machado <lgustavo@codesourcery.com>
Pedro Alves <palves@redhat.com>
diff --git a/gdb/btrace.c b/gdb/btrace.c
index d1af128..3b4e60d 100644
--- a/gdb/btrace.c
+++ b/gdb/btrace.c
@@ -630,11 +630,12 @@ btrace_compute_ftrace_bts (struct thread_info *tp,
beginning. */
if (begin != NULL)
{
- warning (_("Recorded trace may be corrupted around %s."),
- core_addr_to_string_nz (pc));
-
end = ftrace_new_gap (end, BDE_BTS_OVERFLOW);
ngaps += 1;
+
+ warning (_("Recorded trace may be corrupted at instruction "
+ "%u (pc = %s)."), end->insn_offset - 1,
+ core_addr_to_string_nz (pc));
}
break;
}
@@ -672,14 +673,15 @@ btrace_compute_ftrace_bts (struct thread_info *tp,
/* We can't continue if we fail to compute the size. */
if (size <= 0)
{
- warning (_("Recorded trace may be incomplete around %s."),
- core_addr_to_string_nz (pc));
-
/* Indicate the gap in the trace. We just added INSN so we're
not at the beginning. */
end = ftrace_new_gap (end, BDE_BTS_INSN_SIZE);
ngaps += 1;
+ warning (_("Recorded trace may be incomplete at instruction %u "
+ "(pc = %s)."), end->insn_offset - 1,
+ core_addr_to_string_nz (pc));
+
break;
}
@@ -750,11 +752,10 @@ ftrace_add_pt (struct pt_insn_decoder *decoder,
{
struct btrace_function *begin, *end, *upd;
uint64_t offset;
- int errcode, nerrors;
+ int errcode;
begin = *pbegin;
end = *pend;
- nerrors = 0;
for (;;)
{
struct btrace_insn btinsn;
@@ -785,11 +786,29 @@ ftrace_add_pt (struct pt_insn_decoder *decoder,
flag. The ENABLED instruction flag means that we continued
from some other instruction. Indicate this as a trace gap. */
if (insn.enabled)
- *pend = end = ftrace_new_gap (end, BDE_PT_DISABLED);
+ {
+ *pend = end = ftrace_new_gap (end, BDE_PT_DISABLED);
+ *ngaps += 1;
+
+ pt_insn_get_offset (decoder, &offset);
+
+ warning (_("Non-contiguous trace at instruction %u (offset "
+ "= 0x%" PRIx64 ", pc = 0x%" PRIx64 ")."),
+ end->insn_offset - 1, offset, insn.ip);
+ }
/* Indicate trace overflows. */
if (insn.resynced)
- *pend = end = ftrace_new_gap (end, BDE_PT_OVERFLOW);
+ {
+ *pend = end = ftrace_new_gap (end, BDE_PT_OVERFLOW);
+ *ngaps += 1;
+
+ pt_insn_get_offset (decoder, &offset);
+
+ warning (_("Overflow at instruction %u (offset = 0x%" PRIx64
+ ", pc = 0x%" PRIx64 ")."), end->insn_offset - 1,
+ offset, insn.ip);
+ }
}
upd = ftrace_update_function (end, insn.ip);
@@ -820,19 +839,16 @@ ftrace_add_pt (struct pt_insn_decoder *decoder,
if (begin == NULL)
continue;
- pt_insn_get_offset (decoder, &offset);
-
- warning (_("Failed to decode Intel Processor Trace near trace "
- "offset 0x%" PRIx64 " near recorded PC 0x%" PRIx64 ": %s."),
- offset, insn.ip, pt_errstr (pt_errcode (errcode)));
-
/* Indicate the gap in the trace. */
*pend = end = ftrace_new_gap (end, errcode);
*ngaps += 1;
- }
- if (nerrors > 0)
- warning (_("The recorded execution trace may have gaps."));
+ pt_insn_get_offset (decoder, &offset);
+
+ warning (_("Decode error (%d) at instruction %u (offset = 0x%" PRIx64
+ ", pc = 0x%" PRIx64 "): %s."), errcode, end->insn_offset - 1,
+ offset, insn.ip, pt_errstr (pt_errcode (errcode)));
+ }
}
/* A callback function to allow the trace decoder to read the inferior's